IRS2168 International Rectifier Corp., IRS2168 Datasheet
IRS2168
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IRS2168 Summary of contents
Page 1
... Programmable run frequency Closed-loop ignition current regulation RoHs compliant Description The IRS2168D is a fully integrated, fully protected 600 V ballast control IC designed to drive all types of fluorescent lamps. The IRS2168D is based on the popular IR2166 control IC with additional improvements to increase ballast performance. The PFC ...
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... V. This supply pin should not be driven by a DC, low impedance power source greater than the V specified in the Electrical Characteristics section. www.irf.com Definition pin offset voltage slew rate ≤ +25 ºC (16-Pin DIP) A )/R (16-Pin SOIC) θJA A (16-Pin DIP) (16-Pin SOIC) IRS2168D(S)PbF All voltage Min. Max. Units -0.3 625 V – 0 ...
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... FMIN LO HO PFC =25 C unless otherwise specified. BUS ZX A Definition Min 11.5 9.5 1.5 quiescent current --- CC --- supply current --- 14.6 --- 8.0 7.0 --- IRS2168D(S)PbF Min. Max BSUV+ CLAMP -1 600 V V CCUV+ CLAMP Note 300 -25 125 = 42.2 kΩ N/ CPH VCO ...
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... PFC =25 C unless otherwise specified. BUS ZX A Definition Min 20 -40 12.0 0.2 --- 3.9 4.1 4.0 1.8 100 5.5 --- 150 2.7 1.1 IRS2168D(S)PbF = 42.2 kΩ N/ CPH VCO Typ Max Units Test Conditions MODE = RUN 3.5 V VBUS V =4.0 V COMP µA MODE = RUN V = 4.5 V -30 -20 VBUS V =4 ...
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... R FMIN LO HO PFC =25 C unless otherwise specified. BUS ZX A Definition Min 42.5 81 --- 1.1 1.1 1.9 8.8 4.6 --- --- --- 8.8 --- 1.1 30 4.7 2.5 1.9 2.85 0.9 --- --- --- IRS2168D(S)PbF = 42.2 kΩ N/ CPH VCO Typ Max Units Test Conditions 44.5 46.5 MODE = RUN kHz RPH = 42.2 kΩ MODE = PREHEAT 50 --- % 1.6 2.1 µs 1.6 2.1 2 9.3 9.8 4.9 5 ...
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... FET is on B/10V B www.irf.com = 1000 pF, R FMIN LO HO PFC =25 C unless otherwise specified. BUS --- --- --- --- --- --- 13 IRS2168D(S)PbF = 42.2 kΩ N/ CPH VCO COM --- V V --- CC 120 220 ns 50 100 180 --- mA 260 --- 13.4 --- V 55 --- C =0.1 µF ...
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... PH Counter IGN R OUT IN Mode Logic VCC RUN VCC UVLO OVP Gain OTA1 4.3V VCC VBUS Under-Voltage Reset IRS2168D(S)PbF VCC Bootstrap Control Driver and High- Deadtime Side Logic Driver Ignition Regulation Low- Side Driver 1.2V Fault Logic Ballast Control ...
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... Oscillating @f RUN EOLTH+) EOL Thresholds Enabled PFC = Low Gain Mode V Threshold Enabled BUS UV C Fault Counter Enabled S Ignition Regulation Disabled All values are typical. IRS2168D(S)PbF V < 10. CCUV- (V Fault or Power Down) CC SD/EOL > 5 SDTH+ (Lamp Fault or Lamp Removal) ) CCUV+ ...
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... Half-Bridge current sensing input Low-side gate driver output 12 COM IC power & signal ground VCC Logic & low-side gate driver supply High-side gate driver floating supply 14 VB SD/EOL 15 VS High voltage floating return 9 HO High-side gate driver output 16 IRS2168D(S)PbF Description Page 9 ...
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... Timing Diagrams Ballast Section VCC 15.6V UVLO+ UVLO- CPH (2/3)*VCC (1/3)*VCC 2V VCO FREQ HO 1.25V UVLO www.irf.com (RFMIN//RPH) PH IGN HO LO 1.25V CS IRS2168D(S)PbF RAMP PH VCO f (RFMIN) run PH IGN RUN UVLO Page 10 ...
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... IC is fully functional before the high- and low-side output drivers are activated. Figure 1 shows an efficient supply voltage using the micro-power start-up current of the IRS2168D together with a snubber charge pump from the half-bridge output ( and D ) ...
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... EVENTS counter are both enabled. The PFC circuit is working in high-gain mode (see PFC section) and keeps the DC bus voltage regulated at a constant level. Ignition Mode (IGN) The IRS2168D ignition mode is defined by the second time C charges from 1/3 When the voltage on pin CPH exceeds ...
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... CC CPHRUN+ ) EVENTS Figure 8: Ballast output voltage and CPH pin during (Figs. 7 and IGN preheat and ignition with deactivated lamp, time span IRS2168D(S)PbF V OUT V CPH IGN t RAMP 100ms V ...
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... BUSUV- LO For proper ballast design, the CS 1.25V pin BUS BUSUV- CC IRS2168D(S)PbF or decrease below 1 during run EOLTH- can be decreased below (lamp removal). Either of these will force SDTH+ is above V (ballast power on) and CCUV+ ) and back below 3 ...
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... PF and a low THD. To achieve this, the IRS2168D includes an active power factor correction (PFC) circuit. The control method implemented in the IRS2168D is for a boost-type converter (Fig. 10) running in critical- conduction mode (CCM). This means that during each switching cycle of the PFC MOSFET, the circuit waits until the inductor current discharges to zero before turning the PFC MOSFET on again ...
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... M2 VCC to 3.0V UVLO- COMP3 ZX 6 2.0V 5.1V Figure 13: IRS2168D detailed PFC control circuit The off-time determined by the time it takes the PFC L current to discharge to zero. The zero current level PFC is detected by a secondary winding on LPFC that is connected to the ZX pin through an external current limiting resistor R ...
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... When this occurs discharged internally to UVLO. CC The IRS2168D enters UVLO mode and both the PFC and ballast sections are disabled. The start-up supply resistor together with the micro-power start-up current, CC should be set such that the ballast turns line input voltage above the level at which the DC bus begins to drop ...
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... RMS ⋅ ⋅ OUT DC bus voltage Nominal rms AC input voltage PFC efficiency (typically 0.95) Ballast output power OUT η ⋅ Minimum rms AC input voltage i over the specified ballast operating temperature range. PK value: VCC + 10 PK IRS2168D(S)PbF [H] (1) [A] (peak) (2) [ Ω ] (3) [ Ω ] (4) Page 18 ...
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... IRS2168D(S)PbF Page 19 ...
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... H REEL DIMENSIONS FOR 16SOICN Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 22.40 G 18.50 21.10 H 16.40 18.40 IRS2168D(S)PbF Imperial Min Max 0.311 0.318 0.153 0.161 0.618 0.641 0.291 0.299 0.252 0.260 0.402 0.409 0.059 n/a 0.059 0.062 D A Imperial Min Max 12 ...
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... SOIC Tape & Reel IRS2168DSTRPbF www.irf.com ORDER INFORMATION 16-Lead PDIP IRS2168DPbF 16-Lead SOIC IRS2168DSPbF This product has been designed and qualified for the industrial level. Qualification standards can be found at IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 Data and specifications subject to change without notice ...