MB15A02 Fujitsu Microelectronics, MB15A02 Datasheet - Page 5

• Manufacturer Part Number: MB15A02
• Description: Low Power Serial Input PLL Synthesizer With 1.1ghz Prescaler
• Manufacturer: Fujitsu Microelectronics

FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT
Serial data input is achieved by three inputs, such as Data pin, Clock pin and LE pin. Serial data input controls 15-bit programmable
reference divider and 18-bit programmable divider, respectively.
Binary serial data is input to Data pin.
On rising edge of clock shifts one bit of serial data into the internal shift register and when load enable pin is high level or open, stored
data is transferred into latch according to the control bit.
Control data ”H” data is transferred into 15-bit latch.
Control data ”L” data is transferred into 18-bit latch.
PROGRAMMABLE REFERENCE DIVIDER
Programmable reference divider consists of 16-bit shift register, 15-bit latch and 14-bit programmable reference counter. Serial 16-bit
data format is shown below.
14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO
PROGRAMMABLE DIVIDER
Programmable divider consists of 19-bit shift register, 18-bit latch, 7-bit swallow counter and 11-bit programmable counter.
Serial 19-bit data format is shown following page.
NOTES: Divide ratio less than 6 is prohibited.
C
Divide
16383
Ratio
R
6
7
S
1
Divide ratio: 6 to 16,383
SW: This bit selects divide ratio of prescaler.
S1 to S14: These bits select divide ratio of programmable reference divider.
C: Control bit (sets at high level).
Start data input with MSB first.
14
S
2
S
0
0
1
Control bit
LSB
Divide ratio of programmable reference counter setting bit
SW=H : 64/65
SW=L : 128/129
13
S
S
3
0
1
0
Direction of data shift
12
S
4
S
0
0
1
11
S
S
5
0
0
1
10
S
S
6
0
0
1
Divide ratio of prescaler setting bit
S
S
7
9
0
0
1
S
S
8
8
0
0
1
S
S
9
7
0
0
1
10
S
S
6
0
0
1
11
S
S
5
0
0
1
12
S
S
4
0
0
1
MSB
13
S
S
3
1
1
1
14
S
S
2
1
1
1
W
S
S
0
1
1
1
MB15A02
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