MB15F03L Fujitsu Media Devices, MB15F03L Datasheet - Page 8

• Manufacturer Part Number: MB15F03L
• Description: Dual Serial Input PLL Frequency Synthesizer
• Manufacturer: Fujitsu Media Devices

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8
MB15F03L
f
P:
N:
A:
f
R:
Serial Data Input
sections, programmable reference dividers of IF/RF PLL sections are controlled individually.
Serial data of binary data is entered through Data pin.
On rising edge of clock, one bit of serial data is transferred into the shift register. When load enable signal is high,
the data stored in the shift register is transferred to one of latch of them depending upon the control bit data setting.
Shift Register Configuration
VCO
OSC
FUNCTIONAL DESCRIPTIONS
The divide ratio can be calculated using the following equation:
f
Serial data is entered using three pins, Data pin, Clock pin, and LE pin. Programmable dividers of IF/RF–PLL
: Output frequency of external voltage controlled oscillator (VCO)
: Reference oscillation frequency
VCO
CN1
Preset divide ratio of dual modulus prescaler (16 or 32 for IF-PLL, 64 or 128 for RF-PLL)
Preset divide ratio of binary 11-bit programmable counter (5 to 2,047)
Preset divide ratio of binary 7-bit swallow counter (0 A
Preset divide ratio of binary 14-bit programmable reference counter (5 to 16,383)
H
H
Programmable Reference Counter
= {(P x N) + A} x f
L
L
Control bit
CN1, 2
R1 to R14
T1, 2
X
Note: Data input with MSB first.
LSB
C
N
1
1
C
N
2
2
CN2
3
T
1
H
H
L
L
: Control bit
: Divide ratio setting bits for the programmable reference counter (5 to 16,383) [Table. 2]
: Test purpose bit
: Dummy bits(Set "0" or "1")
OSC
4
T
2
R
5
1
R
The programmable reference counter for the IF-PLL.
The programmable reference counter for the RF-PLL.
The programmable counter and the swallow counter for the IF-PLL
The programmable counter and the swallow counter for the RF-PLL
R
6
2
(A < N)
R
3
7
R
8
4
R
9
5
Table1. Control Bit
10
R
6
11
R
Data Flow
7
12
R
8
Destination of serial data
13
R
9
14
10
R
127)
15
11
R
16
12
R
13
17
R
14
18
R
19 20 21 22 23
X
X
X
X
[Table. 1]
[Table.3]
MSB
X