S1M8653B Samsung Semiconductor, Inc., S1M8653B Datasheet

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S1M8653B

Manufacturer Part Number
S1M8653B
Description
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
BASEBAND ANALOG PROCESSOR
INTRODUCTION
The S1M8653B is a baseband analog processing IC for dual-mode CDMA/FM
portable cellular telephones. The S1M8653B interfaces between the analog
RF and digital processing sections of the cellular phone. The receive circuit
functions primarily to translate analog IF signals to the baseband frequency
range and convert analog baseband signals into digital signals. Transmit
circuits convert digital data into analog baseband signals which are then up-
converted to the IF frequency band. The analog inputs and outputs of the
S1M8653B interface with IF transmit/receive circuitry of telephones; the digital
inputs and outputs interface directly with the Mobile Station Modem (MSM).
FEATURES
APPLICATIONS
ORDERING INFORMATION
Dual-mode for CDMA/FM operation
Receive signal path includes:
— IF to baseband down converter
— Built-in low pass filter
— Two 4-bit ADCs
— Local Oscillator
General purpose 8-bit ADC for system monitoring
Power saving modes
Single 3.3V power supply
80 pin LQFP package
S1M8653BQ: CDMA/FM Dual
Dual-mode CDMA/FM cellular telephones
S1M8653BQ
Device
80-QFP-1212
Package
Operating Temperature
Transmit signal path includes:
— Two 8-bit DACs
— Base-band to IF up converter
— Local Oscillator
— Built-in low pass filter
-40 to +85 C
80-LQFP-1212
S1M8653B
1

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S1M8653B Summary of contents

Page 1

... BASEBAND ANALOG PROCESSOR INTRODUCTION The S1M8653B is a baseband analog processing IC for dual-mode CDMA/FM portable cellular telephones. The S1M8653B interfaces between the analog RF and digital processing sections of the cellular phone. The receive circuit functions primarily to translate analog IF signals to the baseband frequency range and convert analog baseband signals into digital signals. Transmit circuits convert digital data into analog baseband signals which are then up- converted to the IF frequency band ...

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... S1M8653B SYSTEM BLOCK DIAGRAM Memory & Peripheral Figure 1. Dual Mode CDMA/FM Cellular Telephone Block 2 Baseband RF/IF Analog System Processor Mobile Station Modem BASEBAND ANALOG PROCESSOR CODEC ...

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... CDMA 4-bit ADC FM 8-bit ADC CDMA 4 4-bit ADC FM 8-bit ADC 8 8-bit DAC 2 8-bit DAC Mode Control Logic 8-bit General Purpose ADC S1M8653B TCXO/4 RXID3 - 0 RXIFMDATA CHIPx8 RXQD3 - 0 RXQFMDATA RXFMCLK RXFMSTB IOFFSET QOFFSET TXD7 - 0 TXCLK/CLKB SLEEPB IDLEB FMB LOCK ADC_CLK ADC_DATA ADC_EN 3 ...

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... V DD RXIF RXIF TST GND V DD TXIF TXIF GND V DD FM_MOD TXVCO_T1 TXVCO_T2 PD_ISET PD_OUT GND 4 1 S1M8653B Figure 3. Pin Configuration BASEBAND ANALOG PROCESSOR RXDQ3 RXDQ2 RXDQ1 RXDQ0 RXDI3 RXDI2 RXDI1 RXDI0 CHIPx8 V DDD GNDD TXCLK TXCLK TXD7 TXD6 TXD5 TXD4 ...

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... This pin is used during testing. Connect to analog GND. Analog differential transmit IF outputs. These pins are active in CDMA and FM RXTX modes. In all other modes, these pins are pulled high. Analog FM modulation signal output active in FM RXTX mode only. When inactive pulled low. S1M8653B 5 ...

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... S1M8653B PIN DESCRIPTION (Continued) Pin No. Symbol Type 16 TXVCO_T1 17 TXVCO_T2 18 PD_ISET 19 PD_OUT 20,22,25 GND V 21, LOCK 26 TCXO 6 Equivalent Circuit 0. BASEBAND ANALOG PROCESSOR Description The transmit VCO tuning pins connect to an external LC tank circuit for precise setting of the transmit VCO frequency. The transmit VCO is active in CDMA and FM RXTX modes ...

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... The CHIPx8 synthesizer is a digital divider with a ratio of 512/1025 times the TCXO input frequency. As such, it will have an average output frequency of 9.8304MHz, but will not have an exact 50% duty cycle. When the CHIPx8 synthesizer is disabled (CDMA SLEEP and FM RX modes) the CHIPx8 signal is pulled to a logic low. S1M8653B 7 ...

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... S1M8653B PIN DESCRIPTION (Continued) Pin No. Symbol 53–56 RXDI0–RXDI3 57–60 RXDQ0–RXDQ3 61 RXFMSTB 62 RXFMCLK 63 RXQFMDATA 64 RXIFMDATA 65, 66 GNC 67 GND QOFFSET 70 IOFFSET 8 Type Equivalent Circuit – VREF BASEBAND ANALOG PROCESSOR ...

Page 9

... CDMA IDLE or FM IDLE modes are invoked when this input is low and SLEEP is high. Pulled low if left unconnected CDMA mode select. Pulled low if left unconnected. Receive VCO output. Active in CDMA and FM RXTX and IDLE modes. Pulled low when inactive. S1M8653B 9 ...

Page 10

... IF signal is reduced to I and Q base-band components by mixing with 85.38MHz local oscillator (LO) signals in quadrature followed by low pass filtering. The 85.38MHz I and Q LO signals are generated on the S1M8653B. The receive VCO is set to 170.76MHz (or 440.76MHz external varactor tuned resonant tank circuit (inductor L and capacitor C connected in parallel) ...

Page 11

... An analog FM modulation signal is constructed from 8-bit digital data supplied by the MSM. Only the Q-channel DAC is used in the S1M8653B in FM mode, all other CDMA circuits are disabled. The DAC output is filtered by a low pass anti-aliasing filter and output as the analog FM modulation signal, FM_MOD. ...

Page 12

... IDLE mode. Slotted Paging mode consumes much less power than IDLE mode. The states of three digital inputs, FM, IDLE, SLEEP, define the operating modes of the S1M8653B (see Table 1). These logic signals come directly from the MSM and minimize the power consumed by the S1M8653B by disabling unused circuits ...

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... 3. 3. IDLE Value 5 0.5 DD -40 to +85 -55 to +125 Min. Typ Max. 3.0 - 3.6 - Min. Typ Max 0.5 1 TBD - V -0 0.3 2 0.4 S1M8653B Unit Units V C Units ...

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... S1M8653B ELECTRICAL CHARACTERISTICS (Continued) (V Characteristic Logic input leakage current Input capacitance, digital input Digital output load capacitance Digital output load resistance Input resistance input pins Input capacitance input pins Input impedance of offset adjust pins Load resistance output- pins ...

Page 15

... Figure Figure 7 x8R t Figure 7 x8F t FM receive ADC, FMCKH figure receive ADC, FMCKL figure receive ADC, FMCKY figure receive ADC, STBPW figure receive ADC, SUS figure 8 S1M8653B Min. Typ Max. Units - 50 50 101 ...

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... S1M8653B SWITCHING CHARACTERISTICS (Continued) (V Characteristic Strobe input valid after FMCLK falling edge 10% to 90% rise time 90% to 10% falling time Output delay after FMCLK rising edge Enable pulse width high Enable pulse width low ADCENA high to ADCCLK ADCCLK low ADCCLK high ADCCLK period ...

Page 17

... TIMING DIAGRAM TXCLK TXCLKB TXD7 - 0 TXCLK TXCLKB TXD7 - 0 t TXCY t t TXCH TXCL TX-Q TX-I TX Figure 5. CDMA Transmit DAC Timing t TXFCY t t TXFCH TXFCL TX-DATA TX-DATA t SU Figure 6. FM Transmit DAC Timing TX-I TX-Q TX TX-DATA TX-DATA t H S1M8653B 17 ...

Page 18

... S1M8653B TIMING DIAGRAM (Continued) CHIPx8 RXID3 - 0 RXQD3 - 0 FMCLK RXFMSTB RXQFMDATA RXIFMDATA 18 t X8CY t t X8H X8L t DO Figure 7. CDMA Receive ADC Timing t TXFCY t t FMR FMF t FMCKH 90% 10% t FMCKL t STBPW Last LSB MSB t DOF Figure 8. FM Receive ADC Timing BASEBAND ANALOG PROCESSOR ...

Page 19

... CHIPx8 t TOC t ENPWH t t ENCK GCY GSU GCL GCH MSB t GDO Figure 9. General Purpose ADC Timing t XLCY t t XLR XLF t XLH 90% 10% t XLL t XL4CY t XL4L t X8CY t X8L t X8H Figure 10. TCXO and CHIPx8 Timing t ENPWL 90% 10% MSB t XL4H S1M8653B 19 ...

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... S1M8653B SYSTEM PERFORMANCE PARAMETERS CDMA Rx Performance (V = 3.3V Characteristic Rx full-path gain Rx input sensitivity Rx input dynamic range (Input desense check) Maximum available IF frequency Rx output total harmonic distortion (ADC linearity check) Offset Adjust gain Signal path gain variation Signal path out-of-band frequency attenuation Overall full-path in-band ripple Rx filter I ...

Page 21

... ATTCR 1.2MHz 10MHz Min. Typ - -28 210 270 0 Min. Typ 250 300 9.5 104 IF < 130.38 -4 -58 S1M8653B Max. Units -18.4 dBc 300 %FS/V 1 1.0 dBpp 30 Spp - dB Max. Units 380 mVpp dBc dBc dBc dBc dBc/Hz MHz 1.5 dBpp ...

Page 22

... S1M8653B FM Tx Performance (V = 3.3V Characteristic IF Output amplitude IF SNR, Noise band 1 IF SNR, Noise band 2 Output Amplitude variation Spurious free dynamic range: IF harmonics FM_MOD output voltage FM_MOD amplitude variation FM_MOD spurious free dynamic range FM_MOD SNR FM_MOD amplitude flatness 22 Symbol Test Conditions VTXFT Full scale signals ...

Page 23

... Using Ris to vary nominal output current. VCPD SREF NLO CDMA mode outputs, full scale DC inputs to I and Q. Tank Q > 3.3V Symbol Test Conditions GOFF Mid-scale code referred to +1.5Volt GERR GDLE GILE S1M8653B Min. Typ Max. Units - 19.68 - MHz 0.5 - 2.0 Vpp - - 500 MHz - -100 ...

Page 24

... APPLICATION INFORMATION Receive IF Inputs The receive IF inputs, RXIF and RXIF, differentially drive an input stage within the S1M8653B, where the input impedance is nominally equal to 500 Ohms. These pins are biased level of 1.6 Volts and require AC coupling. AC coupling capacitor values should be chosen to maximize the power transfer from receive IF circuitry into the S1M8653B ...

Page 25

... The transmit IF outputs, TXIF and TXIF, are differential emitter-follower outputs with nominal output impedance of 50 ohms. The DC bias on these outputs necessitates AC coupling to the subsequent transmit IF signal path in order to maximize the power transferred from the S1M8653B. The internal ground and power rails associated with the transmit IF output circuitry are pins 13(GND) and 14(V DD Figure 13 ...

Page 26

... PCS band(440.76 MHz). The IF input sensitivity of typical PLL for the mobile phone applications range from - 25dBm to -30dBm at 450 MHz, well below the receive VCO output levels of the S1M8653B. The receive VCO circuitry uses two ground pins; one pin is dedicated to the single-ended output drive stage(pin 1) but the other pin(pin 4) is shared by rest of the circuitry ...

Page 27

... The frequency of oscillation for any LC resonant tank circuit is determined by, where L and C are the equivalent inductance and capacitance, respectively, of the tank circuit and parasitics of the S1M8653B. The parasitic capacitance between the RXVCO_T1 and RXVCO_T2 pins of the S1M8653B has been measured to be about 4 pF. Recommended Q factor of the resonant tank circuit is any value greater than 20. ...

Page 28

... The external resistor connected to the PD_ISET determines the level of the charge-pump current sourced by PD_OUT, which affects the band-width of the transmit PLL. TCXO (Temperature Compensated Crystal Oscillator) Shown in the table below is the specifications for this oscillator. It must be temperature compensated, and provide a stable and accurate 19.68 MHz signal to the S1M8653B 47p ...

Page 29

... Control voltage range 2ppm/ C 0.3ppm/V Control voltage input impedance LPF PD External VCO M=106 External Tuned M Circuitry VCO CXO Figure 19. Transmit VCO Synthesizer -120dBc/Hz@100Hz min. 235 + 0.5V to 2.5V 100k Pin24 Lock LOCK 10uA DET ACQ 160uA I 1/2 DIV Quad M/N S1M8653B 0.2ppm 60Hz min. 29 ...

Page 30

... The full path offset sensitivity has been set to 270% FS/V. Please refer to the functional description section of this document for more information on the I/Q offset control. MODEM 30 Voltage Divider 69 & MSM 70 Ripple Filter Figure 20. * Time constant should be longer than 1ms Figure 21. BASEBAND ANALOG PROCESSOR Vref 69 S1M8653B 70 ...

Page 31

... ADC and DAC Ranges Since ADCs and DACs on the S1M8653B have access to internally generated references, no external adjustment or calibrations are required. The GP ADC can be used for various purposes such as monitoring parameters like battery voltage and temperature. For a nominal power of 3.3 Volts the center of the input voltage range is 1.5 Volts ...

Page 32

... S1M8653B Transmit DAC The two 8-bit transmit DACs contained in the S1M8653B transform digital data from the MSM into analog signals. Each data conversion is made on the rising edge of TCLK and TCLKB signals and output to an internal anti-alias- ing filter. The transmit DAC has been implemented using the current segmentation method. ...

Page 33

... Analyzer ID0 0.01u 50 TCUKB 49 TCUK 48 TD7 47 TD6 46 TD5 45 TD4 44 TD3 43 TD2 42 TD1 41 0.01u S1M8653B SLEEP IDLE Pattern FM Generator Pattern Generator 1k 8-bit DAC TGADO Spectrum 0.01u Analyzer FMCLK Pattern FMSTB Generator 1k 8-bit DAC TFIADO 0.01u Spectrum Analyzer 1k 8-bit DAC TFQADO 0.01u ...

Page 34

... Analog Switch 0.01u =3.3V Digital GND S1M8653B 0.01u TCXO OSC 10k * Power on transient time must be width 10ms Figure 25. Application Circuit BASEBAND ANALOG PROCESSOR MODE CONTROL ANALOG SWITCH ADC_ENABLE ADC_DATA 10k ADC_CLK I_OFFSET ...

Page 35

... BASEBAND ANALOG PROCESSOR PACKAGE DIMENSION 0.55 (0.022) Max. 0.45 (0.018) Min. 14.00(0.551) Normal 12.00 (0.471) Normal 1.60 (0.057) Max. 0.27 (0.014) Max. 0.09 (0.010) Min.. S1M8653B 0-10 0.15 0.20 (0.006) Max. 0.09 (0.002) Min. 35 ...

Page 36

... S1M8653B 36 BASEBAND ANALOG PROCESSOR NOTES ...

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