OPA3680 Burr-Brown, OPA3680 Datasheet - Page 11

• Manufacturer Part Number: OPA3680
• Description: Triple / Wideband / Voltage-Feedback OPERATIONAL AMPLIFIER With Disable
• Manufacturer: Burr-Brown

APPLICATIONS INFORMATION
WIDEBAND VOLTAGE FEEDBACK OPERATION
The OPA3680 provides an exceptional combination of high
output power capability with a wideband, unity gain stable
voltage feedback op amp using a new high slew rate input
stage. Typical differential input stages used for voltage
feedback op amps are designed to steer a fixed-bias current
to the compensation capacitor, setting a limit to the achiev-
able slew rate. The OPA3680 uses a new input stage which
places the transconductance element between two input
buffers, using their output currents as the forward signal. As
the error voltage increases across the two inputs, an increas-
ing current is delivered to the compensation capacitor. This
provides very high slew rate (1800V/ s) while consuming
relatively low quiescent current (6.4mA). This exceptional
full power performance comes at the price of a slightly
higher input noise voltage than alternative architectures. The
4.8nV/ Hz input voltage noise for the OPA3680 is excep-
tionally low for this type of input stage.
Figure 1 shows the DC-coupled, gain of +2, dual power
supply circuit configuration used as the basis of the 5V
Specifications and Typical Performance Curves. For test
purposes, the input impedance is set to 50 with a resistor to
ground and the output impedance is set to 50 with a series
output resistor. Voltage swings reported in the specifications
are taken directly at the input and output pins, while output
powers (dBm) are at the matched 50 load. For the circuit of
Figure 1, the total effective load will be 100
disable control line is typically left open to guarantee normal
amplifier operation. Two optional components are included
in Figure 1. An additional resistor (100 ) is included in
series with the non-inverting input. Combined with the 25
DC source resistance looking back towards the signal genera-
tor, this gives an input bias current cancelling resistance that
FIGURE 1. DC-Coupled, G = +2, Bipolar Supply, Specifi-
50 Source
V
I
cation and Test Circuit.
50
100
0.1 F
249
R
G
0.1 F
–V
S
OPA3680
+5V
–5V
1/3
+V
6.8 F
+
S
249
R
+
F
6.8 F
V
DIS
O
0.1 F
50
|| 498 . The
50 Load
11
matches the 125
input (see the DC Accuracy and Offset Control section). In
addition to the usual power supply decoupling capacitors to
ground, a 0.1 F capacitor is included between the two power
supply pins. In practical PC board layouts, this optional-
added capacitor will typically improve the 2nd harmonic
distortion performance by 3dB to 6dB.
Figure 2 shows the AC-coupled, gain of +2, single supply
circuit configuration which is the basis of the +5V Specifi-
cations and Typical Performance Curves. Though not a “rail-
to-rail” design, the OPA3680 requires minimal input and
output voltage headroom compared to other very wideband
voltage feedback op amps. It will deliver a 3Vp-p output
swing on a single +5V supply with >150MHz bandwidth.
The key requirement of broadband single-supply operation is
to maintain input and output signal swings within the useable
voltage ranges at both the input and the output. The circuit
of Figure 2 establishes an input midpoint bias using a simple
resistive divider from the +5V supply (two 402
The input signal is then AC-coupled into the midpoint
voltage bias. The input voltage can swing to within 1.5V of
either supply pin, giving a 2Vp-p input signal range centered
between the supply pins. The input impedance matching
resistor (68 ) used for testing is adjusted to give a 50 input
load when the parallel combination of the biasing divider
network is included. Again, an additional resistor (50
this case) is included directly in series with the non-inverting
input. This minimum recommended value provides part of
the DC source resistance matching for the non-inverting
input bias current. It is also used to form a simple parasitic
pole to roll off the frequency response at very high frequen-
cies (>500MHz) using the input parasitic capacitance to
form a bandlimiting pole. The gain resistor (R
coupled, giving the circuit a DC gain of +1, which puts the
input DC bias voltage (2.5V) at the output as well. The
FIGURE 2. AC-Coupled, G = +2, Single Supply, Specifica-
V
I
68
0.1 F
tion and Test Circuit.
402
402
249
0.1 F
50
source resistance seen at the inverting
R
G
OPA3680
+5V
1/3
+V
S
OPA3680
249
R
F
0.1 F
V
O
DIS
+
6.8 F
100
G
resistors).
) is AC-
V
S
/2
in
®