AD9802 Analog Devices, AD9802 Datasheet

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AD9802

Manufacturer Part Number
AD9802
Description
CCD Signal Processor For Electronic Cameras
Manufacturer
Analog Devices
Datasheet

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PRODUCT DESCRIPTION
The AD9802 is a complete CCD signal processor developed
for electronic cameras. It is suitable for both camcorder and
consumer-level still camera applications.
The signal processing chain is comprised of a high speed CDS,
variable gain PGA and 10-bit ADC. Required clamping cir-
cuitry and an onboard voltage reference are provided as well as a
direct ADC input. The AD9802 operates from a single +3 V
supply with a typical power consumption of 185 mW.
The AD9802 is packaged in a space saving 48-terminal thin
quad flatpack (TQFP) and is specified over an operating tem-
perature range of 0 C to +70 C.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
10-Bit, 18 MSPS A/D Converter
18 MSPS Full Speed Correlated Double Sampler (CDS)
Low Noise, Wideband PGA
Internal Voltage Reference
No Missing Codes Guaranteed
+3 V Single Supply Operation
Low Power CMOS: 185 mW
48-Terminal TQFP Package
PRODUCT HIGHLIGHTS
1. On-Chip Input Clamp and CDS
2. On-Chip PGA
3. Direct ADC Input
4. 10-Bit, High Speed A/D Converter
5. Low Power
6. Digital I/O Functionality
7. Small Package
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
ADCIN
PIN
DIN
Clamp circuitry and high speed correlated double sampler
allow for simple ac-coupling to interface a CCD sensor at full
18 MSPS conversion rate.
The AD9802 includes a low-noise, wideband amplifier with
analog variable gain from 0 dB to 31.5 dB (linear in dB).
A direct input to the 10-bit A/D converter is provided for
digitizing video signals.
A linear 10-bit ADC is capable of digitizing CCD signals at
the full 18 MSPS conversion rate. Typical DNL is 0.5 LSB
and no missing code performance is guaranteed.
At 185 mW, and 15 mW in power-down, the AD9802 con-
sumes a fraction of the power of presently available multichip
solutions.
The AD9802 offers three-state digital output control.
Packaged in a 48-terminal, surface-mount thin quad flatpack,
the AD9802 is well suited to very compact, low headroom
designs.
CMLEVEL VRT VRB STBY
PBLK
REFERENCE
FUNCTIONAL BLOCK DIAGRAM
CLPDM
CLAMP
CDS
For Electronic Cameras
CCD Signal Processor
World Wide Web Site: http://www.analog.com
PGACONT1 PGACONT2
PGA
CLPOB
CLAMP
MUX
ADCMODE
© Analog Devices, Inc., 1997
S/H
SHP
AD9802
ACVDD
GENERATOR
AD9802
TIMING
SHD ADCCLK
A/D
ADVDD
10
DRVDD
DVDD
DOUT

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