MAX146 Maxim, MAX146 Datasheet - Page 17

• Manufacturer Part Number: MAX146
• Description: +2.7Low-Power / 8-Channel / Serial 12-Bit ADCs
• Manufacturer: Maxim

Pulling SHDN low places the converter in hardware
power-down (Table 6). Unlike software power-down
mode, the conversion is not completed; it stops coin-
cidentally with SHDN being brought low. SHDN also
controls the clock frequency in internal clock mode.
Letting SHDN float sets the internal clock frequency to
1.8MHz. When returning to normal operation with SHDN
Figure 12a. Timing Diagram Power-Down Modes, External Clock
Figure 12b. Timing Diagram Power-Down Modes, Internal Clock
CLOCK
MODE
MODE
DOUT
SHDN
CLOCK
MODE
SSTRB
MODE
DOUT
DIN
DIN
S X X X X X 1 1
S X X X X X 1 0
______________________________________________________________________________________
SETS EXTERNAL
CLOCK MODE
SETS INTERNAL
CLOCK MODE
CONVERSION
12 DATA BITS
POWERED UP
Hardware Power-Down
POWERED UP
EXTERNAL
DATA VALID
S
+2.7V, Low-Power, 8-Channel,
X
X
X
X
X
0 0
INTERNAL
S
SETS SOFTWARE
POWER-DOWN
X
X
12 DATA BITS
X
floating, there is a t
where C
Pulling SHDN high sets internal clock frequency to
225kHz. This feature eases the settling-time requirement
for the reference voltage. With an external reference, the
MAX146/MAX147 can be considered fully powered up
within 2µs of actively pulling SHDN high.
X
X
0 0
SETS
POWER-DOWN
L
POWER-DOWN
CONVERSION
SOFTWARE
is the capacitive loading on the SHDN pin.
Serial 12-Bit ADCs
SETS EXTERNAL
CLOCK MODE
S
X X X X X
POWERED UP
RC
delay of approximately 2MΩ x C
1 1
DATA VALID
POWER-DOWN
VALID
DATA
HARDWARE
EXTERNAL
POWER-
INVALID
DOWN
DATA
S
POWERED UP
POWERED UP
17
L
,