STK6001 Syntec Semiconductor, STK6001 Datasheet - Page 30

• Manufacturer Part Number: STK6001
• Description: Scaler
• Manufacturer: Syntec Semiconductor

Mode
4. Write data into Gamma Table. (write WrGamma)
5. If continuing to write the next address, go to step.4; else change another address and go to step.3,
6. Enable Gamma Correction. (EnGamma = 1)
Connecting the panel with minimum bit(s) (ex. the 18-bit panel), enable the function (EnDIT=1) to
simulate the 24-bit panel, and enable the dynamic Dithering (EnFRC=1) to enhance the effect of
Dithering.
When the input video resolution is inferior to the output one and couldn’t be enhanced as the output
video resolution, you can set the Reg. to change the panel border color not filled out by the input video.
In the Reg., bit [1:0], [3:2], [5:4] means the two maximum bits of RGB respectively; the other bits are
0.
Write Reg[0F] 0x60, 0x90, 0x60 in proper order to enter the Debug Mode. This moment, the internal
signal in this Scaler IC will be output to the Panel Odd Pixel output pins. Write the last Byte to select
which set of internal signals to output.
1
2
3
4
5
2.2.10 Dithering Control
2.2.11 Panel Border Color
2.2.12 Debug Mode
or change another Gamma Table and go to step.2, or stop write Gamma Table go to step.6.
EnDIT
EnFRC
BGC[5:0]
EnTest[7:0]
R EvenD[7]
G
B
R
G
B
R iOSD_B[5] iOSD_B[4] iOSD_B[3] iOSD_B[2] iOSD_B[1] iOSD_B[0]
G iOSD_G[5] iOSD_G[4] iOSD_G[3] iOSD_G[2] iOSD_G[1] iOSD_G[0] iOSD_B[7] iOSD_B[6]
B iOSD_R[5] iOSD_R[4] iOSD_R[3] iOSD_R[2] iOSD_R[1] iOSD_R[0] iOSD_G[7] iOSD_G[6]
R DOUT[7]
G iWVC[1]
B IEnRdH
R POUT[7]
G LatGPO
B GmaAdr
IClrOV
SyncH
ExpH
HSIP
7
0
EvenD[6] OddD[23]
DOUT[6] DOUT[5]
GmaData iWrTbl[2]
iWVC[0]
POUT[6]
iEnRdV
SyncV
iMask
ExpV
VSIP
6
0
0
{0x65[1]}
{0x65[2]}
{0x64}
{0x0F}
iSetPosEQ iNewMaxTog POUT[23] POUT[22] POUT[15] POUT[14]
POUT[5]
iRVC[1]
EnOUT
iClrOH
HCZ
CLP
5
0
0
STK96C100
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OddD[22]
iWrTbl[1]
DOUT[4]
POUT[4]
iRVC[0]
LatCLK
EmptyH
iClrOV
PHDE
VCZ
4
0
EvenD[23] EvenD[22] EvenD[15] EvenD[14]
DOUT[13] DOUT[22] DOUT[15] DOUT[14]
OddD[15] OddD[14]
iWrTbl[0]
DOUT[3] DOUT[2]
POUT[3]
EmptyV
PVDE
PCLK
DISP
3
0
POUT[2]
EmptyH
iEnRdH
iINC[2]
DispH
XDE
2
0
DOUT[1] DOUT[0]
POUT[1]
OddD[7]
iEnRdV
iINC[1]
ExpH1
HXDE
DispV
VCZ
1
0
POUT[0]
OddD[6]
iINC[0]
iClrOH
ExpV1
VXDE
PCLK
HCZ
0
0