MAX8759 Maxim Integrated Products, MAX8759 Datasheet - Page 20

• Manufacturer Part Number: MAX8759
• Description: CCFL Backlight Controller
• Manufacturer: Maxim Integrated Products

values. POR occurs when V
The UVLO occurs when V
MAX8759 disables both high-side and low-side switch
drivers below the UVLO threshold.
The MAX8759 is placed into shutdown by clearing bit 0
of the device control register (0x01).When the
MAX8759 is shut down, all functions of the IC are
turned off except the 5.35V linear regulator. In shut-
down, the linear regulator output voltage drops to 4.5V
and the supply current is 6µA (typ). While in shutdown,
the fault latch is reset. The device can be reenabled by
setting bit 0 of the device control register to 1.
The MAX8759 provides the supply voltage of the ALS
through the VALS pin. VALS is internally connected to
the 5.35V linear regulator output through a p-channel
MOSFET. The p-channel MOSFET is turned on when the
MAX8759 is enabled and turned off when the part is dis-
abled. Bypass VALS to ground with a minimum 0.lµF
ceramic capacitor. Place the capacitor as close to the
ALS supply input as possible.
Low-Cost, SMBus, CCFL Backlight Controller
20
Figure 8. SMBus Protocols
SEND-BYTE FORMAT
WRITE-BYTE FORMAT
READ-BYTE FORMAT
S = START CONDITION
P = STOP CONDITION
—
S
—
Ambient-Light-Sensor Supply Pin (VALS)
S
______________________________________________________________________________________
—
S
ADDRESS
SLAVE ADDRESS
7 BITS
ADDRESS
7 BITS
SLAVE ADDRESS
ADDRESS
7 BITS
WR
1b
WR
1b
ACK
SHADED = SLAVE TRANSMISSION
ACK = ACKNOWLEDGED = 0
1b
CC
ACK
Low-Power Shutdown
CC
1b
COMMAND BYTE: SENDS COM-
MAND WITH NO DATA; USUALLY
USED FOR ONE-SHOT COMMAND
is below 4.2V (typ). The
COMMAND
rises above 1.75V (typ).
WR
1b
COMMAND BYTE: SELECTS
WHICH REGISTER YOU ARE
READING FROM
8 BITS
COMMAND
8 BITS
ACK
1b
ACK
1b
COMMAND BYTE: SELECTS
WHICH REGISTER YOU ARE
WRITING TO
ACK
—
1b
P
COMMAND
8 BITS
RECEIVE-BYTE FORMAT
—
—
S
S
WR = WRITE = 0
RD = READ = 1
/// = NOT ACKNOWLEDGED = 1
The MAX8759 supports an SMBus-compatible 2-wire
digital interface. SDA is the bidirectional data line and
SCL is the clock line of the 2-wire interface correspond-
ing respectively to SMBDATA and SMBCLK lines of the
SMBus. SDA and SCL have Schmidt-triggered inputs
that can accommodate slow edges; however, the rising
and falling edges should still be faster than 1µs and
300ns, respectively. The MAX8759 uses the write-byte
and read-byte protocols (Figure 8). The SMBus proto-
cols are documented in System Management Bus
Specification
http://www.sbs-forum.org/.
The MAX8759 is a slave-only device and responds to
the 7-bit address 0b0101100. The read and write com-
mands can be distinguished by adding ONE more bit
(R/W bit) to the end of the 7-bit slave address, with one
indicating read and zero indicating write. The MAX8759
has seven registers: a brightness control register
(0x00), a device control register (0x01), a fault/status
register (0x02), an identification register (0x03), an ALS
status register (0x04), an ALS low-limit register (0x05),
SLAVE ADDRESS: REPEATED
DUE TO CHANGE IN DATA-
FLOW DIRECTION
SLAVE ADDRESS
ADDRESS
ADDRESS
7 BITS
7 BITS
ACK
1b
RD
RD
1b
1b
DATA BYTE: DATA GOES INTO THE
REGISTER SET BY THE COMMAND BYTE
V1.08
SMBus Interface (SDA, SCL)
ACK
ACK
1b
1b
8 BITS
DATA
DATA BYTE: READS FROM THE
REGISTER SET BY THE COMMAND
BYTE
DATA BYTE: READS DATA FROM THE
REGISTER COMMANDED BY THE
LAST READ-BYTE OR WRITE-BYTE
TRANSMISSION; ALSO USED FOR
SMBus ALERT RESPONSE RETURN
ADDRESS
and
8 BITS
8 BITS
DATA
DATA
are
ACK
available
1b
1b
1b
///
///
—
P
—
—
P
P
at