16C6N5 Renesas Technology / Hitachi Semiconductor, 16C6N5 Datasheet - Page 14

• Manufacturer Part Number: 16C6N5
• Description: Renesas MCU
• Manufacturer: Renesas Technology / Hitachi Semiconductor

M16C/6N Group (M16C/6N5)
Rev.2.40
REJ03B0004-0240
Under development
This document is under development and its contents are subject to change.
3. Memory
Figure 3.1 shows a Memory Map. The address space extends the 1 Mbyte from address 00000h to FFFFFh.
The internal ROM is allocated in a lower address direction beginning with address FFFFFh. For example, a
128-Kbyte internal ROM is allocated to the addresses from E0000h to FFFFFh.
As for the flash memory version, 4-Kbyte space (block A) exists in 0F000h to 0FFFFh. 4-Kbyte space is
mainly for storing data. In addition to storing data, 4-Kbyte space also can store programs.
The fixed interrupt vector table is allocated to the addresses from FFFDCh to FFFFFh. Therefore, store the
start address of each interrupt routine here.
The internal RAM is allocated in an upper address direction beginning with address 00400h. For example, a
5-Kbyte internal RAM is allocated to the addresses from 00400h to 017FFh. In addition to storing data, the
internal RAM also stores the stack used when calling subroutines and when interrupts are generated.
The Special Function Registers (SFRs) are allocated to the addresses from 00000h to 003FFh. Peripheral
function control registers are located here. Of the SFR, any area which has no functions allocated is reserved
for future use and cannot be accessed by user.
The special page vector table is allocated to the addresses from FFE00h to FFFDBh. This vector is used by
the JMPS or JSRS instruction. For details, refer to M16C/60, M16C/20, M16C/Tiny Series Software Manual.
In memory expansion and microprocessor modes, some areas are reserved for future use and cannot be
used by users.
Figure 3.1 Memory Map
NOTES:
5 Kbytes
Capacity
1. During memory expansion mode or microprocessor mode, cannot be used.
2. In memory expansion mode, cannot be used.
3. As for the flash memory version, 4-Kbyte space (block A) exists.
4. When using the masked ROM version, write nothing to internal ROM area.
5. Shown here is a memory map for the case where the PM10 bit in the PM1 register is 1 (block A enabled, addresses 10000h to
Aug 25, 2006
26FFFh for CS2 area).
M16C/6N Group (M16C/6N5) has no device model expanded over 192 Kbytes of the internal ROM.
Accordingly, set the PM13 bit to 0.
Internal RAM
Address XXXXX
017FF
h
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h
128 Kbytes
Capacity
Internal ROM
Address YYYYY
E0000
(4)
h
h
FFFFFh
XXXXXh
0FFFFh
YYYYYh
0F000h
00000h
00400h
10000h
27000h
28000h
80000h
(program area)
Reserved area
Reserved area
Reserved area
(data flash)
Internal RAM
Internal ROM
External area
External area
Internal ROM
SFR
(3)
(2)
(1)
(4)
FFFDCh
FFE00h
FFFFFh
Oscillation stop and re-oscillation
Undefined instruction
detection / watchdog timer
BRK instruction
Special page
Address match
vector table
Single step
Overflow
Reset
DBC
NMI
3. Memory