MTC20154-TQ-C2 ST Microelectronics, Inc., MTC20154-TQ-C2 Datasheet

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MTC20154-TQ-C2

Manufacturer Part Number
MTC20154-TQ-C2
Description
Integrated Adsl CMOS Analog Front-end Circuit
Manufacturer
ST Microelectronics, Inc.
Datasheet

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Features
Applications
DESCRIPTION
The MTC20154 is the fifth generation Analog
Front End (AFE) designed for DMT based ADSL
(Asynchronous Digital Subscriber Line) modems
compliant with ANSI T1.413 category 2 standard.
It includes one 12 bit DAC and one 13 bit ADC.It is
Figure 1. Block Diagram
February 2004
Fully integrated AFE for ADSL
Overall 12 bit resolution, 1.1MHz signal
bandwidth
8.8 MS/s ADC
8.8 MS/s DAC
THD: -60 dB @ full scale
1V full scale input
Differential analog I/O
Accurate continuous-time channel filtering
3
Filters
64 pin TQFP package
350mW power consumption
ADSL Front-end for all full rate and Lite
standards
INTEGRATED ADSL CMOS ANALOG FRONT-END CIRCUIT
rd
& 4
th
order tunable continuous time LP
G = -0..31dB, 1dB step
A = -15..0dB, 5dB step
RXN
RXP
TXN
TXP
G= -9..6dB
1dB step
AACrx AGCrx
AGCtx
HC/DS
1.1MHz
T uning
circuit
I/V - Ref
SC/US
138KHz
VCXO DAC
Xtal-driver
intended to be used with the MTC20156/
MTC20147 DMT/ATM processors as part of the
MTK20150/MTK20141 chipsets, but may also be
used to support other xDSL signal processors.
The MTC20154 provides programmable low pass
filters for each of the two channels and automatic
gain control. A configuration pin allows the filters to
be switched from ATU-R mode to ATU-C mode.
The pipeline ADC architecture provides 13 bit dy-
namic range and a signal bandwith of 1.1 MHz.
The device consumes only 0.35 Watt in full opera-
tion and has a power down mode for standby. It is
housed in a compact 64 pin thin plastic quad flat
package.
Calibration
MTC10154TQ-C (Temp.: 0 to 70°C)
ADC
DAC
ICCQ
12bits
ORDERING NUMBER:
CTRL/TST
(10 x 10 1.4mm)
13bits
ifce
TQFP64
MUX
MUX
4bits
4bits
MTC20154
1/21

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MTC20154-TQ-C2 Summary of contents

Page 1

... ADSL Front-end for all full rate and Lite standards DESCRIPTION The MTC20154 is the fifth generation Analog Front End (AFE) designed for DMT based ADSL (Asynchronous Digital Subscriber Line) modems compliant with ANSI T1.413 category 2 standard. It includes one 12 bit DAC and one 13 bit ADC.It is Figure 1 ...

Page 2

... MTC20154 Functional Description The MTC20154 chip can be used on the ATU-C side (LT), and on the ATU-R (NT) side (defined by LTNT pin). The selection consists mainly of a filter interchange between the RX and TX path. The filters (with a programmable cutoff frequency) use automatic continuous time tuning to avoid time varying phase char- acteristics which can be of dramatic consequence for DMT modems ...

Page 3

... Pin Assignement Table 1. Pinning Description MTC20154 AFE Pin Name Digital interface 64 DVSS Negative supply for input I/Os + core 1 TX3 Transmit data bus bit 3 (MSB) 2 TX2 Transmit data bus bit 2 3 TX1 Transmit data bus bit 1 4 TX0 Transmit data bus bit 0 (LSB) ...

Page 4

... MTC20154 Table 1. Pinning Description MTC20154 AFE (continued) Pin Name 23 VRAN ADC negative reference decoupling 24 VRAP ADC positive reference decoupling 25 AVDDADC ADC analog positive supply 29 AVDD Internal TX pre--driver positive TXDRV supply 30 TXN Analog TX signal negative output (diff) 31 TXP Analog TX signal positive output (diff) TX output ...

Page 5

... Table 1. Pinning Description MTC20154 AFE (continued) Pin Name 59 AVSS Crystal driver analog negative supply Ana supply XTAL 60 AVSSDAC DAC analog negative supply 61 IVCO VCO steering current reference 62 VCOcap VCO external capacity connection 63 VCXOI VCO steering current output Mode selection interface 26 LTNT ...

Page 6

... Symbol V Any V supply voltage, related to substrate Voltage at any input pin Storage Temperature st T Lead Temperature (10 second soldering Power Dissipation d T Junction Temperature j 6/21 MTC20154-TQ ADSL Analog Front End Parameter 48 AVDDLNA 47 T1N 46 T1P 45 N.C. 44 AVSSLNA 43 AVSSFILT 42 T2P 41 T2N 40 AGND 39 AVDDFILT 38 N ...

Page 7

... Symbol Parameter VOL Low level output voltage VOH High level output voltage Cload Load capacitance Dcycle Duty cycle Parameter Parameter Test Condition Iout = -4 mA Iout = 4mA Test Condition Iout = -4 mA Iout = 4mA MTC20154 Min. Max. Unit 3.0 3.6 V 2.7 3 VDD V -40 85 ° ° ...

Page 8

... MTC20154 Analog TX/RX Signals The reference impedance for all power calculations is 100Ω. DMT Signal A DMT signal is basically the sum of N independently QAM modulated signals, each carried over a distinct carrier. The frequency separation of each carrier is 4.3125 KHz with a total number of 256 carriers (ANSI). ...

Page 9

... 35.328 MHz or 17.664 MHz VCODAC VCXO -15.. 31db L LNA 138 KHz MTC-20154 -g..+6db TXP 1.1 MHz TXN MTC20154 Master clock 35.328 MHz Nibbles 17.664 MHz Word 8.832/4.416 MHz 13bits 8.832 MS/s 4.416 MS/s D/A 4 convertor CTRLIN LTNT=1 RESETN 4 D/A convertor 12bits 8.832 MS/s 4.416 MS/s ...

Page 10

... MTC20154 ATU-R Side Block Diagram The ATU-R side block diagram is equal to the ATU-C side block diagram with the following differences: - The transformer ratio is 1:1 - Termination resistors are 50Ω for 100Ω lines filter may be used on the TX path to reduce DMT sidelobes and out-of-band noise influence on the receiver ...

Page 11

... LNA input common mode voltage at the nominal value: AVDD/2. This is done by the use of an internal biasing circuit therefore mandatory to decouple the MTC20154 input from any external DC biasing system. The Low Noise Amplifier (LNA) placed after the ATT will be used in combination with the attenu- ation block. The goal is to obtain a range of RX path input level varying from – ...

Page 12

... MTC20154 Table 10. LNA characteristics Data Input common mode voltage Input differential voltage Maximum peak input differential voltage Output common mode voltage Maximum peak output differential voltage Amplification step Amplification range Input refered noise at max gain, min atten. (over a 36 kHz to 1.1 MHz band) ...

Page 13

... LSB (out of 13 bits) 1.1 Vpdif (+- 3.3 V) 8.832 MHz < 0.5 dB without in-band ripple 5 sampling clock periods 1k 10k 100k 1M 10M MTC20154 700 kHz 600 kHz 48.0 dB @500 kHz 42.5 dB @800 kHz Hz 13/21 ...

Page 14

... MTC20154 TX Pre-driver Capability The pre-driver drives an external line power amplifier which transmits the required power to the line. Table 15. Pre-driver characteristics TX drive level to the external line driver for max AGC setting External line driver input impedance: Pre-driver characteristics: gain range: common mode voltage: ...

Page 15

... AVDD. < 15 mVrms in band white noise for Pre-driver AVDD. Voltage Controlled Crystal Oscillator A voltage controlled crystal oscillator driver is integrated in the MTC20154. Two nominal frequencies can be used: 35.328 MHz or 17.664 MHz. The quartz crystal is connected between the pins XTALI and XTA- LO. ...

Page 16

... Digital Interface Control Interface The digital code setting for the MTC20154 configuration is sent over a serial line (CTRLIN) using the word clock (CLWD). The data burst is composed of 16 bits from which the first bit is used as start bit (’0’), the three LSBs being used to identify the data contained in the 12 remaining bits. Test related data are latched but they are overruled by the normal settings if the TEST pin is low ...

Page 17

... and a most negative number MTC20154 max Remarks – – b12 b5 b9 b13 b6 b10 b14 b7 b11 b15 14 -1, the most negative n.u. n. ...

Page 18

... The MTC20154 is placed in power-down mode when the PD pin is high. The system specifications are requiring different behavior of the MTC20154 under power down mode according to the fact that the MTC20154 is used at the LT or the NT side. The chip status is depicted in the following table: Table 23. Power Down ...

Page 19

... The MTC20154 is placed in reset mode when the RESETN pin is pulled to ground (active low signal). The system specifications are requiring different behavior of the MTC20154 under reset mode according to the fact that the MTC20154 is used at the LT or the NT side. The chip status is depicted in the following table: Table 24. Reset Function (N.B. The reset signal is dominant over the powerdown signal.) ...

Page 20

... MTC20154 mm DIM. MIN. TYP. MAX. A 1.60 A1 0.05 0.15 0.002 A2 1.35 1.40 1.45 0.053 B 0.17 0.22 0.27 0.0066 0.0086 0.0086 C 0.09 0.0035 D 11.80 12.00 12.20 0.464 D1 9.80 10.00 10.20 0.386 D3 7.50 e 0.50 E 11.80 12.00 12.20 0.464 E1 9.80 10.00 10.20 0.386 E3 7.50 L 0.45 0.60 0.75 0.0177 0.0236 0.0295 L1 1.00 K 0˚ (min.), 3.5˚ (min.), 7˚(max.) ccc 0.080 20/21 inch MIN. TYP. MAX. 0.063 0.006 0.055 ...

Page 21

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