TSS463 ATMEL Corporation, TSS463 Datasheet - Page 16

• Manufacturer Part Number: TSS463
• Description: VAN Data Link Controller with Serial Interface
• Manufacturer: ATMEL Corporation

16
TSS463B
Figure 14. Framing Sequences
When the complete SOF sequence has been transmitted or received, the circuit will
start the transmission or reception of the identifier field.
All data on the VAN bus, including the identifier and Frame Check Sum (FCS), are
transmitted using enhanced Manchester code.
In enhanced Manchester code, three NRZ bits are transmitted first followed by one
Manchester bit, then three more NRZ bits followed by one Manchester bit and so on.
Since the high state is recessive and the low state is dominant, the bus arbitration can
be done. If a module wants access to the bus, it must first listen to the bus during one
full End of Frame (EOF) and one full Inter Frame Spacing (IFS) period to determine
whether the bus is free or not (i.e. no dominant states received).
Figure 15. Data Encoding
The IFS is defined to be a minimum of 64 prescaled clock periods. The TSS463B,
accepts an IFS of zero prescaled clocks for the reception only of a SOF sequence.
Once the bus has been determined as being free, the module must, if it is an autono-
mous module, emit an SOF sequence or, if it is a synchronous access module, wait until
it detects a preamble sequence.
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
NUMBER OF
PRESCALED
CLOCKS
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
NUMBER OF
PRESCALED
CLOCKS
0
END OF
DATA
16
0
32
ACK
48
PREAMBLE
START OF FRAME
NRZ 0
64
8
80
MANCHESTER 0
MANCHESTER 1
96
16
END OF FRAME
112 128 144
NRZ 1
START
SYNC
24
160 176 192
32
4102E–AUTO–12/04