MD2241-D128-V3 M-Systems Inc., MD2241-D128-V3 Datasheet - Page 14

• Manufacturer Part Number: MD2241-D128-V3
• Description: Diskonchip Dimm Plus
• Manufacturer: M-Systems Inc.

3.4.2 Unique Identification (UID) Number
Each DiskOnChip DIMM Plus is assigned a 16-byte UID number. Burned onto the flash during production, the UID
cannot be altered and is unique worldwide. The UID is essential in security-related applications, and can be used to
identify end-user products in order to fight fraudulent duplication by imitators.
The UID on DiskOnChip DIMM Plus eliminates the need for an additional on-board ID device, such as a dedicated
EEPROM.
3.4.3 One-Time Programmable (OTP) Area
The 6 KByte OTP area is user-programmable for complete customization. The user can write to this area once, after
which it is automatically locked permanently. After it is locked, the OTP area becomes read only, just like a ROM
device.
Typically, the OTP area is used to store customer and product information such as: product ID, software version,
production data, customer ID and tracking information.
3.5
During boot, code must be executed directly from the flash media, rather than first copied to the host RAM and then
executed from there. This direct XIP code execution capability is essential for booting.
The Programmable Boot Block with XIP capability enables DiskOnChip DIMM Plus to act as a boot ROM device
in addition to being a flash disk. This unique design enables the user to benefit from the advantages of NOR flash,
typically used for boot and code storage, and NAND flash, typically used for data storage. No other boot device is
required on the motherboard.
The Programmable Boot Block on DiskOnChip consists of 1KB of programmable SRAM. The Download Engine
(DE) described in the next section expands the functionality of this block by copying the boot code from the flash
into the internal SRAM.
3.6
Upon power up or when the RSTIN# signal is asserted, the DE automatically downloads the Initial Program Loader
from page 3 of the third block on the flash to the Programmable Boot Block. The Initial Program Loader (IPL) is
responsible for starting the booting process. The download process is fairly quick and is designed so that when the
CPU accesses DiskOnChip for code execution, the IPL code is already located in the internal SRAM in the
Programmable Boot Block.
In addition, the DE downloads the Data Protection Structures (DPS) from the flash to the Protection State Machines,
so that DiskOnChip is secure and protected from the first moment it is active.
During the download process, the DiskOnChip DIMM Plus asserts the BUSY# pin to indicate to the system that it is
not yet ready to be accessed. Once the BUSY# pin is negated, the system can access the DiskOnChip.
A failsafe mechanism prevents improper initialization due to a faulty VCC or invalid assertion of the RSTIN# input.
Another failsafe mechanism is designed to overcome possible NAND flash data errors. It prevents internal registers
from powering up in a state that bypasses the intended data protection. In addition, in any attempt to sabotage the
data structures the entire DiskOnChip will turn both read and write protected and will be completely inaccessible.
3.7
NAND flash, being an imperfect memory, requires error handling. DiskOnChip DIMM Plus implements Reed-
Solomon Error Detection Code (EDC). A hardware-generated, 6-byte error detection signature is computed each
time a page (512 Bytes) is written to or read from DiskOnChip.
The TrueFFS driver implements complementary Error Correction Code (ECC). Unlike error detection, which is
required on every cycle, error correction is relatively seldom required, hence implemented in software. The
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Programmable Boot Block with XIP Capability
Download Engine (DE)
Error Detection Code/Error Correction Code (EDC/ECC)
Preliminary Data Sheet, Rev. 1.2
DiskOnChip DIMM Plus
94-SR-002-08-8L