PIC16CR58A Microchip Technology, PIC16CR58A Datasheet - Page 143

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PIC16CR58A

Manufacturer Part Number
PIC16CR58A
Description
ROM-Based 8-Bit CMOS Microcontroller Series
Manufacturer
Microchip Technology
Datasheets

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14.0
Each PIC16CXX instruction is a 14-bit word divided
into an OPCODE which specifies the instruction type
and one or more operands which further specify the
operation of the instruction. The PIC16CXX instruction
set summary in Table 14-2 lists byte-oriented, bit-ori-
ented, and literal and control operations. Table 14-1
shows the opcode field descriptions.
For byte-oriented instructions, 'f' represents a file reg-
ister designator and 'd' represents a destination desig-
nator. The file register designator specifies which file
register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If 'd' is zero, the result is
placed in the W register. If 'd' is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, 'b' represents a bit field
designator which selects the number of the bit affected
by the operation, while 'f' represents the number of the
file in which the bit is located.
For literal and control operations, 'k' represents an
eight or eleven bit constant or literal value.
TABLE 14-1:
PCLATH
label Label name
Field
i
dest Destination either the W register or the specified
talics User defined term (font is courier)
TOS
GIE
WDT
< >
( )
1997 Microchip Technology Inc.
PC
TO
PD
[ ]
f
W
b
k
x
d
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don't care location (= 0 or 1)
The assembler will generate code with x = 0. It is the
recommended form of use for compatibility with all
Microchip software tools.
Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1
Top of Stack
Program Counter
Program Counter High Latch
Global Interrupt Enable bit
Watchdog Timer/Counter
Time-out bit
Power-down bit
register file location
Options
Contents
Assigned to
Register bit field
In the set of
INSTRUCTION SET SUMMARY
OPCODE FIELD
DESCRIPTIONS
Description
The instruction set is highly orthogonal and is grouped
into three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
All instructions are executed within one single instruc-
tion cycle, unless a conditional test is true or the pro-
gram counter is changed as a result of an instruction.
In this case, the execution takes two instruction cycles
with the second cycle executed as a NOP. One instruc-
tion cycle consists of four oscillator periods. Thus, for
an oscillator frequency of 4 MHz, the normal instruction
execution time is 1 s. If a conditional test is true or the
program counter is changed as a result of an instruc-
tion, the instruction execution time is 2 s.
Table 14-2 lists the instructions recognized by the
MPASM assembler.
Figure 14-1 shows the general formats that the instruc-
tions can have.
All examples use the following format to represent a
hexadecimal number:
where h signifies a hexadecimal digit.
FIGURE 14-1: GENERAL FORMAT FOR
Note:
Byte-oriented file register operations
Bit-oriented file register operations
Literal and control operations
General
CALL and GOTO instructions only
0xhh
13
13
13
13
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
b = 3-bit bit address
f = 7-bit file register address
k = 8-bit immediate value
k = 11-bit immediate value
OPCODE
OPCODE
OPCODE
OPCODE
To maintain upward compatibility with
future PIC16CXX products, do not use the
OPTION and TRIS instructions.
11
INSTRUCTIONS
10 9
10
8
b (BIT #)
d
7
8
PIC16C6X
6
7
7 6
k (literal)
DS30234D-page 143
f (FILE #)
k (literal)
f (FILE #)
0
0
0
0

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