SST36VF1602C SST, SST36VF1602C Datasheet

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SST36VF1602C

Manufacturer Part Number
SST36VF1602C
Description
(SST36VF1601C / SST36VF1602C) 16 Mbit (x8/x16) Dual-Bank Flash Memory
Manufacturer
SST
Datasheet
FEATURES:
• Organized as 1M x16 or 2M x8
• Dual Bank Architecture
• Single 2.7-3.6V for Read and Write Operations
• Superior Reliability
• Low Power Consumption:
• Hardware Sector Protection/WP# Input Pin
• Hardware Reset Pin (RST#)
• Byte# Pin
• Sector-Erase Capability
• Chip-Erase Capability
• Block-Erase Capability
PRODUCT DESCRIPTION
The SST36VF1601C and SST36VF1602C are 1M x16 or
2M x8 CMOS Read/Write Flash Memory manufactured
with SST’s proprietary, high performance CMOS Super-
Flash technology. The split-gate cell design and thick oxide
tunneling injector attain better reliability and manufacturabil-
ity compared with alternate approaches. The devices write
(Program or Erase) with a 2.7-3.6V power supply and con-
form to JEDEC standard pinouts for x8/x16 memories.
Featuring high performance Program, these devices pro-
vide a typical Program time of 7 µsec and use the Toggle
Bit, Data# Polling, or RY/BY# to detect the completion of
the Program or Erase operation. To protect against inad-
vertent write, the devices have on-chip hardware and Soft-
ware Data Protection schemes. Designed, manufactured,
©2006 Silicon Storage Technology, Inc.
S71249-06-000
1
– 16 Mbit Bottom Sector Protection
– 16 Mbit Top Sector Protection
– Endurance: 100,000 cycles (typical)
– Greater than 100 years Data Retention
– Active Current: 6 mA typical
– Standby Current: 4 µA typical
– Auto Low Power Mode: 4 µA typical
– Protects the 4 outermost sectors (8 KWord)
– Resets the internal state machine to reading
– Selects 8-bit or 16-bit mode
– Uniform 2 KWord sectors
– Uniform 32 KWord blocks
- SST36VF1601C: 12 Mbit + 4 Mbit
- SST36VF1602C: 4 Mbit + 12 Mbit
in the larger bank by driving WP# low and
unprotects by driving WP# high
array data
16 Mbit (x8/x16) Dual-Bank Flash Memory
1/06
SST36VF1601C / 1602C16Mb (x8/x16) Dual-Bank Flash Memory
SST36VF1601C / SST36VF1602C
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Erase-Suspend / Erase-Resume Capabilities
• Security ID Feature
• Fast Read Access Time
• Latched Address and Data
• Fast Erase and Program (typical):
• Automatic Write Timing
• End-of-Write Detection
• CMOS I/O Compatibility
• Conforms to Common Flash Memory Interface (CFI)
• JEDEC Standards
• Packages Available
• All non-Pb (lead-free) devices are RoHS compliant
and tested for a wide spectrum of applications, these
devices are offered with a guaranteed endurance of 10,000
cycles. Data retention is rated at greater than 100 years.
These devices are suited for applications that require con-
venient and economical updating of program, configura-
tion, or data memory. For all system applications, the
devices significantly improve performance and reliability,
while lowering power consumption. Since for any given
voltage range, the SuperFlash technology uses less cur-
rent to program and has a shorter erase time, the total
energy consumed during any Erase or Program operation
is less than alternative flash technologies. These devices
also improve flexibility while lowering the cost for program,
data, and configuration storage applications.
– SST: 128 bits
– User: 128 bits
– 70 ns
– Sector-Erase Time: 18 ms
– Block-Erase Time: 18 ms
– Chip-Erase Time: 35 ms
– Program Time: 7 µs
– Internal V
– Toggle Bit
– Data# Polling
– Ready/Busy# pin
– Flash EEPROM Pinouts and command sets
– 48-ball TFBGA (6mm x 8mm)
– 48-lead TSOP (12mm x 20mm)
– Non-Pb (lead-free) packages available
PP
Generation
These specifications are subject to change without notice.
Data Sheet

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SST36VF1602C Summary of contents

Page 1

... Chip-Erase Capability • Block-Erase Capability – Uniform 32 KWord blocks PRODUCT DESCRIPTION The SST36VF1601C and SST36VF1602C are 1M x16 CMOS Read/Write Flash Memory manufactured with SST’s proprietary, high performance CMOS Super- Flash technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturabil- ity compared with alternate approaches ...

Page 2

... CE# or OE# is high. Refer to the Read cycle timing diagram for further details (Figure 7). ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Program Operation These devices are programmed on a word-by-word or byte-by-byte basis depending on the state of the BYTE# pin ...

Page 3

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Chip-Erase Operation The devices provide a Chip-Erase operation, which allows the user to erase all sectors/blocks to the “1” state. This is useful when a device must be quickly erased. The Chip-Erase operation is initiated by executing a six- byte command sequence with Chip-Erase command (10H) at address 555H in the last byte sequence ...

Page 4

... The devices provide both hardware and software features to protect nonvolatile data from inadvertent writes. ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Hardware Data Protection Noise/Glitch Protection: A WE# or CE# pulse of less than 5 ns will not initiate a Write cycle. ...

Page 5

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Common Flash Memory Interface (CFI) These devices also contain the CFI information to describe the characteristics of the devices. In order to enter the CFI Query mode, the system must write the three-byte sequence, same as the Software ID Entry com- mand with 98H (CFI Query command) to address 555H in the last byte sequence ...

Page 6

... KWord Sectors UAL ANK LASH EMORY 6 SST36VF1601C / SST36VF1602C Block 31 Block 30 Block 29 Block 28 Block 27 Block 26 Block 25 Block 24 Block 23 Block 22 Block 21 Block 20 Block 19 Block 18 Block 17 Block 16 Block 15 Block 14 Block 13 Block 12 ...

Page 7

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Bottom Sector Protection; 64 KByte Blocks; 4 KByte Sectors 16 KByte Sector Protection Note: The address input range in x8 mode (BYTE#=V FIGURE 2: SST36VF1601C, 2M ©2006 Silicon Storage Technology, Inc. 1FFFFFH 1F0000H 1EFFFFH 1E0000H 1DFFFFH 1D0000H 1CFFFFH 1C0000H 1BFFFFH 1B0000H ...

Page 8

... Data Sheet Top Block Protection; 32 KWord Blocks; 2 KWord Sectors 8 KWord Block Protection ( KWord Sectors) Note: The address input range in x16 mode (BYTE#=V FIGURE 3: SST36VF1602C, 1M ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C FFFFFH FE000H FDFFFH F8000H F7FFFH ...

Page 9

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Top Block Protection; 64 KByte Blocks; 4 KByte Sectors 16 KByte Block Protection ( KByte Sectors) Note: The address input range in x8 mode (BYTE#=V FIGURE 4: SST36VF1602C, 2M ©2006 Silicon Storage Technology, Inc. 1FFFFFH 1FC000H Block 31 1FBFFFH 1F0000H 1EFFFFH Block 30 ...

Page 10

... FIGURE SSIGNMENTS FOR ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C TOP VIEW (balls facing down) 6 A13 A12 A14 A15 A16 BYTE# NOTE A10 A11 DQ7 DQ14 DQ13 4 WE# ...

Page 11

... can but no other value Device ID = SST36VF1601C = 734BH, SST36VF1602C = 734AH ©2006 Silicon Storage Technology, Inc. To provide memory addresses. During Sector-Erase and Hardware Sector Protection address lines will select the sector. During Block-Erase lines will select the block. ...

Page 12

... SIWA = User Security ID Program word/byte address For SST36VF1601C, valid Word-Addresses for User Sec ID are from 00010H-00017H. For SST36VF1602C, valid Word-Addresses for User Sec ID are from C0010H-C0017H. All 4 cycles of User Security ID Program and Program Lock-out must be completed before going back to Read-Array mode. ...

Page 13

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C TABLE 6: CFI Q I UERY DENTIFICATION Address Address 2 x16 Mode x8 Mode Data 10H 20H 0051H 11H 22H 0052H 12H 24H 0059H 13H 26H 0001H 14H 28H 0007H 15H 2AH 0000H 16H 2CH 0000H 17H 2EH 0000H ...

Page 14

... In x8 mode, only the lower byte of data is output. ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Description N 21 Device size = 2 Bytes (15H = 21; 2 Flash Device Interface description; 0002H = x8/x16 asynchronous interface Maximum number of bytes in multi-byte write = 2 Number of Erase Sector/Block sizes supported by device Sector Information ( Number of sectors ...

Page 15

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...

Page 16

... T Data Retention Latch Up LTH 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C V = 2.7-3.6V DD Limits Freq Min Max 5 MHz 15 1 MHz ...

Page 17

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C AC CHARACTERISTICS TABLE 13 EAD YCLE IMING Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output ...

Page 18

... ADDRESSES WE# T WPH T AS OE# CE# RY/BY# DQ XXAA 15-0 Note: X can FIGURE 8: WE# C ONTROLLED ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C OLZ T CLZ DATA VALID D IAGRAM 2AA 555 ADDR ...

Page 19

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C 555 ADDRESSES CE# T CPH T AS OE# WE# RY/BY# XXAA DQ 15-0 Note: X can FIGURE 9: CE# C ONTROLLED ADDRESS A 19-0 CE# OE# WE# RY/BY DATA FIGURE 10 ATA OLLING IMING ©2006 Silicon Storage Technology, Inc. 2AA 555 ADDR ...

Page 20

... TWO READ CYCLES WITH SAME OUTPUTS D IAGRAM SIX-BYTE CODE FOR CHIP-ERASE 555 555 2AA 555 XX80 XXAA XX55 , but no other value HIP RASE IMING IAGRAM 20 SST36VF1601C / SST36VF1602C T BR VALID DATA T SCE XX10 S71249-06-000 1249 F08.0 VALID 1249 F09.1 1/06 ...

Page 21

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C SIX-BYTE CODE FOR BLOCK-ERASE 555 2AA ADDRESSES CE# OE WE# RY/BY# XXAA XX55 DQ 15-0 Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchageable as long as minimum timings are met. (See Table 14 Block Address X can but no other value. ...

Page 22

... Data Sheet THREE-BYTE SEQUENCE FOR SOFTWARE ID ENTRY ADDRESSES 555 CE# OE WE# DQ 15-0 XXAA Device ID = 734BH for SST36VF1601C and 734AH for SST36VF1602C Note: X can FIGURE 15 OFTWARE NTRY AND THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ADDRESSES 555 2AA CE# OE ...

Page 23

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C THREE-BYTE SEQUENCE FOR SOFTWARE ID EXIT AND RESET 555 2AA ADDRESSES DQ XXAA 15-0 CE# OE WE# Note: X can FIGURE 17 OFTWARE XIT THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY 555 ADDRESS A 19-0 CE# OE WE# DQ 15-0 XXAA SW0 ...

Page 24

... RY/BY RST# CE#/OE# FIGURE 19: RST IMING IAGRAM RY/BY# RST# CE# OE# FIGURE 20: RST IMING IAGRAM ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C T RHR (W HEN NO INTERNAL OPERATION IS IN PROGRESS URING ECTOR OR LOCK RASE OPERATION 24 1249 F16 ...

Page 25

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 21 NPUT UTPUT FIGURE 22 EST OAD XAMPLE ©2006 Silicon Storage Technology, Inc REFERENCE POINTS ) for a logic “1” and V (0 ...

Page 26

... Data Sheet FIGURE 23 ROGRAM LGORITHM ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Start Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XXA0H Address: 555H Load Address/Data Wait for end of Program ( Data# Polling ...

Page 27

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 24 AIT PTIONS ©2006 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read byte/word Read same No byte/word No Does DQ 6 match? Yes Program/Erase ...

Page 28

... Address: 555H Wait T IDA Read Software ID FIGURE 25 OFTWARE RODUCT ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C CFI Query Entry Command Sequence Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XX98H Address: 555H ...

Page 29

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Load data: XXAAH Load data: XX55H Address: 2AAH Load data: XXF0H Return to normal FIGURE 26 OFTWARE RODUCT ©2006 Silicon Storage Technology, Inc. Software ID Exit/CFI Exit/Sec ID Exit Command Sequence Load data: XXF0H Address: 555H Address: XXH ...

Page 30

... SCE Chip erased to FFFFH FIGURE 27 RASE OMMAND ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Sector-Erase Command Sequence Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XX80H Address: 555H Load data: XXAAH ...

Page 31

... XX XXXXX - XXX Valid combinations for SST36VF1601C SST36VF1601C-70-4C-B3KE SST36VF1601C-70-4C-EKE SST36VF1601C-70-4I-B3KE SST36VF1601C-70-4I-EKE Valid combinations for SST36VF1602C SST36VF1602C-70-4C-B3KE SST36VF1602C-70-4C-EKE SST36VF1602C-70-4I-B3KE SST36VF1602C-70-4I-EKE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. © ...

Page 32

... Ball opening size is 0.38 mm (± 0.05 mm) 48 BALL HIN PROFILE INE PITCH SST B3K ACKAGE ODE ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C BOTTOM VIEW 4.00 6.00 ± 0.20 0. 1.10 ± 0.10 0.12 0.35 ± 0. (TFBGA) 6 ALL RID RRAY 5.60 0.45 ± ...

Page 33

... Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Pin # 1 Identifier 0.70 0.50 Note: 1. Complies with JEDEC publication 95 MO-142 DD dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0 Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. 48- ...

Page 34

... Migrated document to a Data Sheet Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036 ©2006 Silicon Storage Technology, Inc. 16 Mbit Dual-Bank Flash Memory SST36VF1601C / SST36VF1602C Description ±0.3V to RST#=GND and added a figure reference ...

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