MC10H181L Motorola, MC10H181L Datasheet

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MC10H181L

Manufacturer Part Number
MC10H181L
Description
4-Bit Arithmetic Logic Unit/Function Generator
Manufacturer
Motorola
Datasheet

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4-Bit Arithmetic Logic Unit/
Function Generator
16 logic operations and 16 arithmetic operations on two four–bit words. Full
internal carry is incorporated for ripple through operation.
word to the select inputs (S0 through S3) as indicated in the tables of
arithmetic/logic functions. Group carry propagate (P G ) and carry generate (G G )
are provided to allow fast operations on very long words using a second order
look–ahead. The internal carry is enabled by applying a low level voltage to the
mode control input (M).
look–ahead block, the MC10H181 provides high–speed arithmetic operations
on very long words.
family part with 100% improvement in propagation delay and no increase in
power supply current.
NOTE:
9/96
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
20
20
18
18
19
19
16
16
11
11
10
10
22
22
23
23
MAXIMUM RATINGS
Power Supply (V CC = 0)
Input Voltage (V CC = 0)
Output Current — Continuous
Operating Temperature Range
Storage Temperature Range — Plastic
21
21
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
9
9
LOGIC DIAGRAM
LOGIC DIAGRAM
Motorola, Inc. 1996
The MC10H181 is a high–speed arithmetic logic unit capable of performing
Arithmetic logic operations are selected by applying the appropriate binary
When used with the MC10H179, full–carry look–ahead, as a second order
This 10H part is a functional/pinout duplication of the standard MECL 10K
13
13
15
15
17
17
14
14
Improved Noise Margin, 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
A0
A0
B0
B0
A1
A1
B1
B1
A2
A2
B2
B2
A3
B3
B3
C n
C n
M
M
S0 S1
S0 S1
Characteristic
— Surge
S2
S2
C n+4
C n+4
G G
G G
S3
S3
P G
P G
F0
F0
F1
F1
F2
F2
F3
F3
2
2
3
3
7
7
6
6
4
4
8
8
5
5
— Ceramic
FUNCTION SELECT TABLE
S3
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
Function Select
Function Select
S2
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
S1 S0
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
2–275
MECL 10K – Compatible
M is High C = D.C.
M is High C = D.C.
Logic Functions
F = Logical “1”
F = Logical “0”
Symbol
F = A
F = A
F = A + B
F = A + B
F = A + B
F = A + B
F = A B
F = A B
F = A B
F = A B
V EE
T stg
F = A
F = B
F = B
F = A
I out
T A
V I
F

B
B
F = A
F = A plus (A B)
F = A plus (A B)
F = A times 2
F = (A + B) plus 0
F = (A + B) plus (A B)
F = A plus B
F = A plus (A + B)
F = (A + B) plus 0
F = A minus B minus 1
F = (A + B) plus (A B)
F = A plus (A + B)
F = minus 1 (two’s complement)
F = (A B) minus 1
F = (A B) minus 1
F = A minus 1
–55 to +150
–55 to +165
–8.0 to 0
0 to V EE
0 to +75
Rating
Arithmetic Operation
100
M is Low C n is low
M is Low C n is low
50
F
Unit
Vdc
Vdc
mA
C
C
C
REV 6
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Pin assignment is for Dual–in–Line Package.
C N + 4
V CC1
V EE
G G
P G
MC10H181
B3
A3
B2
F0
F1
F3
F2
PIN ASSIGNMENT
Book (DL122/D).
1
2
3
4
5
6
7
8
9
10
11
12
DIP
CERAMIC PACKAGE
PLASTIC PACKAGE
CASE 758–02
CASE 724–03
CASE 776–02
FN SUFFIX
19
24
23
22
21
20
18
17
16
15
14
13
L SUFFIX
P SUFFIX
PLCC
V CC2
M
C N
A0
B0
B1
A1
S1
A2
S2
S0
S3

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