AD622 Analog Devices, AD622 Datasheet - Page 9

• Manufacturer Part Number: AD622
• Description: Low Cost Instrumentation Amplifier
• Manufacturer: Analog Devices

REV. C
INPUT AND OUTPUT OFFSET VOLTAGE
The low errors of the AD622 are attributed to two sources,
input and output errors. The output error is divided by G when
referred to the input. In practice, the input errors dominate at
high gains and the output errors dominate at low gains. The
total V
REFERENCE TERMINAL
The reference terminal potential defines the zero output voltage
and is especially useful when the load does not share a precise
ground with the rest of the system. It provides a direct means of
injecting a precise offset to the output, with an allowable range
of 2 V within the supply voltages. Parasitic resistance should be
kept to a minimum for optimum CMR.
INPUT PROTECTION
The AD622 features 400
inputs, and will safely withstand input overloads of up to 25 V
or 60 mA for up to an hour. This is true for all gains and
power on and off, which is particularly important since the
signal source and amplifier may be powered separately. For
continuous input overload, the current should not exceed 6 mA
(I
clamping the inputs to the supplies (using a diode such as an
IN4148) will reduce the required resistance, yielding lower
noise.
IN
Total Error RTI = input error + (output error/G)
Total Error RTO = (input error G) + output error
V
OS
IN
for a given gain is calculated as:
/400 ). For input overloads beyond the supplies,
of series thin film resistance at its
–9–
RF INTERFERENCE
The circuit of Figure 15 is recommended for AD622 series in-
amps and provides good RFI suppression at the expense of
reducing the (differential) bandwidth. In addition, this RC input
network also provides additional input overload protection (see
input protection section). Resistors R1 and R2 were selected to
be high enough in value to isolate the circuit’s input from ca-
pacitors C1–C3, but without significantly increasing the circuit’s
noise.
R1/R2 and C1/C2 form a bridge circuit whose output appears
across the in-amp’s input pins. Any mismatch between the C1/
R1 and C2/R2 time constant will unbalance the bridge and
reduce common-mode rejection. C3 insures that any RF signals
are common mode (the same on both in-amp inputs) and are
not applied differentially.
This low pass network has a –3 dB BW equal to: 1/(2 (R1 +
R2) (C3 + C1 + C2)). Using a C3 value of 0.047 F as shown,
the –3 dB signal BW of this circuit is approximately 400 Hz.
When operating at a gain of 1000, the typical dc offset shift over
a frequency range of 1 Hz to 20 MHz will be less than 1.5 V
RTI and the circuit’s RF signal rejection will be better than
71 dB. At a gain of 100, the dc offset shift is well below 1 mV
RTI and RF rejection better than 70 dB.
The 3 dB signal bandwidth of this circuit may be increased to
900 Hz by reducing resistors R1 and R2 to 2.2 k . The perfor-
mance is similar to that using 4 k resistors, except that the
circuitry preceding the in-amp must drive a lower impedance
load.
This circuit should be built using a PC board with a ground
plane on both sides. All component leads should be made as
short as possible. Resistors R1 and R2 can be common 1%
metal film units but capacitors C1 and C2 need to be 5%
tolerance devices to avoid degrading the circuit’s common-mode
rejection. Either the traditional 5% silver micas, miniature size
micas, or the new Panasonic 2% PPS film capacitors are
recommended.
Figure 15. RFI Suppression Circuit for AD622 Series In-Amps
–IN
+IN
LOCATE C1–C3 AS CLOSE TO
THE INPUT PINS AS POSSIBLE
4.02k
4.02k
0.047 F
R1
R2
1%
1%
C3
1000pF 5%
C1
C2
1000pF 5%
R
G
3
1
8
2
0.33 F
0.33 F
AD622
–V
4
+V
S
7
0.01 F
S
0.01 F
5
AD622
6
V
OUT