ST14C02C ST Microelectronics, ST14C02C Datasheet - Page 2

• Manufacturer Part Number: ST14C02C
• Description: Memory Card IC 2 Kbit 256 x 8 Serial I2C Bus EEPROM
• Manufacturer: ST Microelectronics

ST14C02C
Figure 2. D15 Contact Connections
The memory behaves as a slave device in the I
protocol, with all memory operations synchronized
by the serial clock. Read and write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by
the Device Select Code which is composed of a
stream of 7 bits (1010000), plus one read/write bit
(R/W) and is terminated by an acknowledge bit.
When writing data to the memory, the memory in-
serts an acknowledge bit during the 9
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoACK for READ.
Table 2. Absolute Maximum Ratings
Note: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
2/12
Symbol
V CC
SCL
2. MIL-STD-883C, 3015.7 (100 pF, 1500
3. EIAJ IC-121 (Condition C) (200 pF, 0
T
V
V
V
T
STG
ESD
CC
IO
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
A
Ambient Operating Temperature
Storage Temperature
Input or Output range
Supply Voltage
Electrostatic Discharge Voltage (Human Body model)
Electrostatic Discharge Voltage (Machine model)
Parameter
)
)
th
1
GND
SDA
bit time,
AI02492
2
C
Figure 3. D20 Contact Connections
Power On Reset: V
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
set (POR) circuit is included. The internal reset is
held active until the V
POR threshold value, and all operations are dis-
abled – the device will not respond to any com-
mand. In the same way, when V
operating voltage, below the POR threshold value,
all operations are disabled and the device will not
respond to any command. A stable and valid V
must be applied before applying any logic signal.
V CC
SCL
Wafer form
Module form
3
2
CC
CC
Lock-Out Write Protect
-65 to 150
-40 to 120
-0.3 to 6.5
-0.3 to 6.5
voltage has reached the
0 to 70
Value
4000
500
CC
drops from the
GND
SDA
MODE
AI02491
Unit
°C
°C
V
V
V
V
CC