SC2615 Semtech, SC2615 Datasheet - Page 11

• Manufacturer Part Number: SC2615
• Description: Complete DDR Power Solution
• Manufacturer: Semtech

Description
The MLP18 is a leadless package whose electrical
connections are made by lands on the bottom surface
of the component. These lands are soldered directly to
the PC board. The MLP has an exposed die attach pad,
which enhances the thermal and electrical characteristics
enabling high power applications. Power handling capability
of the MLP package is typically >2x the power of other
SMT packages. In order to take full advantage of this
feature the exposed pad must be physically connected
to the PCB substrate with solder.
Thermal Pad Via Design
Thermal data ( ja) for the MLP18 is based on a 4 layer
PCB incorporating vias which act as the thermal path to
other layers. (Ref: Jedec Specification JESD 51-5). Based
on thermal performance, four-layer PCB’s with vias are
recommended to effectively remove heat from the device.
Vias should be 0.3mm diameter on a 1.2mm pitch, and
should be plugged to prevent voids being formed between
the exposed pad and PCB thermal pad due to solder
escaping by capillary action. Plugging can be accomplished
by “tenting” the via during the solder mask process. The
via solder mask diameter should be 100µm larger than
the via diameter.
Two layer boards have no vias, thus any heat sinking must
be accomplished in the same plane as the metal traces.
This will typically require an increase in the PC board area.
POWER MANAGEMENT
Mounting Considerations
2003 Semtech Corp.
11
Solder Mask
Design the solder mask around all pads on each side,
i.e. there should be no solder mask between adjacent
terminal fingers.
Exposed Pad Stencil Design
It is good practice to minimize the presence of voids within
the exposed pad inter-connection. Total elimination is
difficult but the design of the exposed pad stencil is
important, a single slotted rectangular pattern is
recommended. (If large exposed pads are screened with
excessive solder, the device may “float”, thus causing a
gap between the MLP terminal and the PCB land
metalization.) The proposed stencil designs enables out-
gassing of the solder paste during reflow as well as
controlling the finished solder thickness.
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