IDT71V424S Integrated Device Technology, IDT71V424S Datasheet - Page 2

• Manufacturer Part Number: IDT71V424S
• Description: 3.3v 512k X 8 Static Ram Center Pwr & Gnd Pinout
• Manufacturer: Integrated Device Technology

Pin Configuration
Pin Description
IDT71V424S, IDT71V424L, 3.3V CMOS Static RAM
4 Meg (512K x 8-bit)
A
CS
WE
OE
I/O
V
V
0
DD
SS
– A
0
- I/O
I/O 0
I/O 1
I/O 2
I/O 3
V
V
18
WE
A0
A1
A2
A3
A4
CS
A5
A6
A7
A8
A9
SS
DD
7
17
18
Address Inputs
Chip Select
Write Enable
Output Enable
Data Input/Output
3.3V Power
Ground
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Top View
SO36-1
SOJ
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
3622 drw 02
I/O 7
I/O 6
I/O 5
I/O 4
V
V
A10
NC
A18
A17
A16
A14
A13
A12
A11
A15
NC
OE
SS
DD
Power
Input
Input
Input
Input
Gnd
I/O
3622 tbl 02
6.42
2
Pin Configuration
Capacitance
(T
NOTE:
1. This parameter is guaranteed by device characterization, but not production
Truth Table
NOTES:
1. H = V
2. V
3. Other inputs ≥V
A
Symbol
V
tested.
CS
C
HC
= +25°C, f = 1.0MHz, SOJ package)
C
H
LC
L
L
L
I/O
IN
(3)
= 0.2V, V
IH
NC
, L = V
NC
A0
A1
A2
A3
A4
CS
I/00
I/01
V
V
I/02
I/03
WE
A5
A8
A9
NC
NC
A6
A7
DD
SS
Input Capacitance
I/O Capacitance
OE
X
H
X
X
L
HC
IL
Commercial and Industrial Temperature Ranges
, x = Don't care.
HC
= V
Parameter
or ≤V
DD
15
17
10
11
12
13
14
16
18
19
20
21
22
1
2
3
4
5
6
7
8
9
-0.2V.
WE
(1,2)
LC
H
H
X
X
L
Top View
.
(1)
TSOP
SO44-2
DATA
DATA
High-Z
High-Z
High-Z
I/O
OUT
IN
V
Conditions
V
OUT
IN
Read Data
Write Data
Output Disabled
Deselected - Standby (I
Deselected - Standby (I
= 3dV
= 3dV
38
44
43
42
41
40
39
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
3622 drw 11
Function
Max.
NC
NC
A18
A17
A16
A15
OE
I/07
I/06
V
V
I/05
I/04
A14
A13
A12
A11
A10
NC
NC
NC
NC
7
8
SS
DD
3622 tbl 01
3622 tbl 03
Unit
SB
SB1
pF
pF
)
)