SI550 SILABS, SI550 Datasheet
SI550
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SI550 Summary of contents
Page 1
... MHz and selected frequencies to 1400 MHz. Unlike traditional VCXO’s where a different crystal is required for each output frequency, the Si550 uses one fixed crystal to provide a wide range of output frequencies. This IC based approach allows the crystal resonator to provide exceptional frequency stability and reliability ...
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Si 550 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 1 Supply Voltage Supply Current 2 Output Enable (OE) Operating Temperature Range Notes: 1. Selectable parameter specified by part number. See Section 3. "Ordering Information" on page 8 for ...
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... O Test Condition mid-level swing (diff) swing (single-ended) mid-level swing (diff) mid-level swing (diff LVPECL/LVDS/CML F CMOS with Preliminary Rev. 0.3 Si550 Min Typ Max 10 — 945 10 — 160 –20 — +20 –50 — +50 –100 — +100 ±25 — ...
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... For best jitter and phase noise performance, always choose the smallest K requirements. See “AN266: VCXO Tuning Slope (K 3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply rejection (PSR) advantage of Si55x versus SAW-based solutions. ...
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... J RMS PER Peak-to-Peak f 74.25 MHz C 45 ppm CMOS Output L (f) –94 –117 –128 –135 –138 –143 n/a Preliminary Rev. 0.3 Si550 Min Typ Max — 2 — — 14 — 300 MHz 622.08 MHz Units 90 ppm/V 45 ppm/V LVPECL LVPECL –74 –77 –98 –101 –112 – ...
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... Soldering Temperature Time @ T PEAK Note: Stresses beyond those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation or specification compliance is not implied at these conditions. Table 9. Environmental Compliance The Si550 meets the following qualification test requirements. Parameter Mechanical Shock Mechanical Vibration Solderability Gross & ...
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... CLK– GND 3 4 CLK+ Table 10. Si550 Pin Descriptions Type Analog Input Control Voltage Output Enable: Input 0 = clock output disabled (outputs tri-stated clock output enabled Ground Electrical and Case Ground Output Oscillator Output Output Complementary Output (N/C for CMOS) ...
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... Configurations are specified using the Part Number Configuration chart shown below. Silicon Labs provides a web browser-based part number configuration utility to simplify this process. Refer to www.silabs.com/ VCXOPartNumber to access this tool and for further ordering instructions. The Si550 VCXO series is supplied in an industry-standard, RoHS compliant, lead-free, 6-pad package. Tape and reel packaging is an ordering option ...
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... Outline Diagram and Suggested Pad Layout Figure 1 illustrates the package details for the Si550. Table 11 lists the values for the dimensions shown in the illustration. Table 11. Package Diagram Dimensions (mm) Dimension aaa bbb ccc ddd Figure 1. Si550 Outline Diagram ...
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... Si 550 5. 6-Pin PCB Land Pattern Figure 2 illustrates the 6-pin PCB land pattern for the Si550. Table 12 lists the values for the dimensions shown in the illustration. Table 12. PCB Land Pattern Dimensions (mm) Dimension Notes: 1. Dimensioning and tolerancing per the ANSI Y14.5M-1994 specification. ...
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... Added Typical Phase Noise performance data in Table 5, “CLK± Output Phase Jitter,” on page 4. Updated 3. "Ordering Information" on page 8. Removed ordering option the 2nd Option Code. Typical APRs replaced with minimum APR values. New 135 ppm/V K option included 2 table for Preliminary Rev. 0.3 Si550 11 ...
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... Toll Free: 1+(877) 444-3032 Email: VCXOinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein ...