74F779SC Fairchild Semiconductor, 74F779SC Datasheet
74F779SC
Specifications of 74F779SC
Related parts for 74F779SC
74F779SC Summary of contents
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... All state changes are initiated by the rising edge of the clock. Ordering Code: Order Number Package Number 74F779SC M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74F779PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Logic Symbol © ...
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Unit Loading/Fan Out Pin Names I/O –I/O Data Inputs 0 7 Data Outputs Select Inputs Output Enable Input (Active LOW) CET Count Enable Trickle Input (Active LOW) CP Clock Pulse Input (Active Rising Edge) ...
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Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current ((Note 5.0 mA Voltage Applied to Output in HIGH State ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH I/O PHL n t Propagation Delay PLH PHL t Propagation Delay PLH t CET to TC PHL t Propagation ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M16B 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...