NCP1650 ON, NCP1650 Datasheet
NCP1650
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NCP1650 Summary of contents
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... The NCP1650 is designed with a true power limiting circuit that will maintain excellent power factor even in constant power mode. It also contains features that allow for fast transient response to changing load currents and line voltages ...
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... Timing capacitor for the internal oscillator. This capacitor adjusts the oscillator frequency Ground Ground reference for the circuit. 16 Output Drive output for power FET or IGBT. Capable of driving small devices, or can be connected to an external driver for larger transistors. NCP1650 Description http://onsemi.com 2 ...
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... Source Boost Current Threshold (V pin6 Sink Boost Current Threshold (V /V pin6 ref Source Boost Current (V + 0.4 V) ref Sink Boost Current (V − 0.4 V) ref 2. Verified by design. NCP1650 Symbol V(I Ref fltr (Unless otherwise noted volts Symbol Osource / ref ...
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... Current Limit Delay (0 to –450 mV Step) (Note 3) REFERENCE MULTIPLIER Dynamic Input Voltage Range Ac Input (p−input) (Note 3) Compensation Input (a−input) (Note 3) Offset Voltage (a−input) Multiplier Gain ramp pk ) (Note 3) 3. Verified by design. NCP1650 (continued) (Unless otherwise noted Symbol = 2.5 V) ref − ...
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... Overvoltage Voltage Trip Point (V /V pin6 ref Overvoltage Voltage Differential (V − TOTAL DEVICE Operational Bias Current (C = 1.0 nF, 100 kHz) L(Driver) Bias Current in Undervoltage Mode 4. Verified by design. NCP1650 (continued) (Unless otherwise noted Symbol ( − +125 ...
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... AMP 20 mA FB/SD VOLTAGE/POWER + ORing NETWORK − 200 mA + 3.68 V − P COMP POWER MULTIPLIER REFERENCE MULTIPLIER AC INPUT OSCILLATOR GND RAMP COMP C T NCP1650 − + SHUTDOWN 0.85 V POWER − 1.08 V ref AMP + + OVERVOLTAGE − 2.5 V COMPARATOR CURRENT CONTROL SHAPING NETWORK Figure 1. Simplified Block Diagram http://onsemi.com 6 V ...
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... TND307/D) 130 125 120 115 110 105 100 Figure 3. q Area (1 oz. Cu Thickness) for a JEDEC Test PCB NCP1650 Figure 2. Timing Diagram Typical Performance Characteristics 100 200 300 400 500 2 COPPER AREA ( Function of the Pad Copper JA http://onsemi ...
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... FREQUENCY (kHz) Figure 6. Ramp Peak versus Frequency 100 150 FREQUENCY (kHz) Figure 8. Max Duty Cycle versus Frequency NCP1650 Typical Performance Characteristics 102 101 100 100 1000 −50 −25 Figure 5. Frequency versus Temperature 4.12 NOTE: Valley Voltage is Zero 4 ...
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... Figure 12. Power Amplifier Gain 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 − 100 150 200 V (mV) IS− Figure 14. Current Sense Amplifier Gain NCP1650 Typical Performance Characteristics −10 −20 −30 0.2 0.4 0.6 −0.3 −0.2 PIN 6 VOLTAGE RELATIVE TO 4.0 V REF−LINEAR REGION Figure 11. Voltage Amplifier Gain −10 − ...
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... RISE TIME 1 k 100 0 50 100 150 200 RISE/FALL TIME (ns) Figure 18. Capacitance versus 10−90% Drive Rise and Fall Times 2.51 2.50 2.49 2.48 −50 − TEMPERATURE ( C) Figure 20. 2.5 Volt Reference versus Temperature NCP1650 Typical Performance Characteristics 6.0 2.5 V 5.0 4.0 3.0 2 1.0 0 4.0 5.0 0 0.5 Figure 17. Power Multiplier Transfer Function 4.01 4.00 3.99 3.98 3.97 3.96 250 300 350 − ...
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... LOAD CURRENT (mA) Figure 22. V Load Regulation ref 10.6 TURN ON 10.5 10.4 10.3 10.2 10.1 TURN OFF 10.0 9.9 −50 − TEMPERATURE ( C) Figure 24. UVLO versus Temperature NCP1650 Typical Performance Characteristics 8 10 Figure 23 100 125 0 2 Figure 25. Input Current versus Input Voltage http://onsemi.com 11 V ref ...
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... NCP1650 R 2 Figure 28. External Shutdown Circuit NCP1650 out R 1 NCP1650 R 2 Figure 27. Shutdown Override Circuit 20 k BAS16LT1 0.33 mF 4.7 k http://onsemi.com 12 V out R 1 FB/ ref 2 4 ZENER DIODE V ref COMP 3 MMBT2907AL NCP1650 Figure 29. Soft−Start Circuit ...
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... POWER MULTIPLIER p a REFERENCE MULTIPLIER AC INPUT REF 4 COMP − AVERAGE CURRENT COMPENSATION GND 15 RAMP COMP NCP1650 REFERENCE REGULATOR − + SHUTDOWN 0.85 V − 1.08 V ref + POWER AMP OVERVOLTAGE + COMPARATOR − 2 REFERENCE BUFFER V−I ...
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... The NCP1650 accomplishes this for both continuous and discontinuous mode power converters. PFC Operation The basic PWM function of the NCP1650 is controlled by a small block of circuitry, which comprises the DC regulation loop and the PFC circuit. These components are shown in Figure 26. ...
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... AC error amplifier has a low frequency pole that allows the average value of the . follow V line in error amplifier is a transconductance amplifier followed by an inverting unity gain buffer stage with a low impedance NCP1650 4 V − PWM + Logic PWM V error(ac) ...
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... DC waveform. The output DC voltage is divided down via. an external divider and fed back to the DC error amplifier. Protection Features The NCP1650 contains a number of features to protect the device and circuit from overload and stressful conditions. These include: Output voltage overshoot protection ...
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... The DC reference is fed into a buffer with a gain of 1.625 which creates a 6.5 volt supply. This is used as an internal voltage to power many of the blocks inside of the NCP1650 and is also available for external use. The 6.5 volt reference is designed to be terminated with at 0.1 mF capacitor for stability reasons ...
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... This gain equation gives the output voltage of the multiplier, where the inputs are the AC fullwave rectified sinewave and the current sense input signal. NCP1650 Multiplier AC Ref 1 k Figure 35. Reference Multiplier Clamp Circuit There resistor between the AC Ref pin and the AC Error Amplifier for ESD protection ...
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... Any use of this signal should incorporate a high impedance buffer. Due to the required accuracy of the peak and valley ramp voltages, the NCP1650 is not designed to be synchronized to the frequency of another oscillator. Current Sense ...
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... Error Amplifiers The NCP1650 has three error amplifiers. These amplifiers regulate the DC output voltage, the maximum output power, and shape the AC reference fullwave rectified sinewave signal. All three of these are transconductance amplifiers. Transconductance amplifiers differ from voltage amplifiers in that the output is a high impedance with a controlled voltage− ...
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... Comparator Set input is dominant over the Reset input. The two Set Inputs are effectively OR’ed together although their dominance varies. The NCP1650 uses a standard Pulse Width Modulation scheme based on a fixed frequency oscillator. The oscillator outputs a ramp waveform as well as a pulse which is coincident with the falling edge of the ramp ...
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... Unity Gain Amplifier Figure 39. AC Reference Buffer Schematic The buffer’s transfer function is: i out + (2 NCP1650 The buffer amplifier, converts the input voltage to a current by creating a current equal to the voltage difference between the AC error amplifier output and the 2.9 volt reference dropped across the 14 kW resistor ...
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... V (Nominal regulated output voltage) out Most of these parameters will be dictated by system requirements. The output voltage may not be defined. In general, it should be slightly greater than the peak of the line waveform at high line. For a 265 v rms NCP1650 DESIGN GUIDELINES REFERENCE REGULATOR VOLTAGE/POWER ORing NETWORK − ...
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... the inductance would be 74 mH. NCP1650 Using the ON Semiconductor spreadsheet, a value of 250 mH allows for continuous mode operation at full load and most input voltages. At the high line value of 265 vac, the unit will operate in the continuous mode from · ...
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... out Where Switch on time ( Period (s) Vin = Low line input voltage (Vrms) LL Vout = DC output voltage ( Vin Vin NCP1650 Ramp Compensation: Equation 3) Where: V refpwm 3 Where Shunt resistance ( Inductance ( Output voltage (V) out R ...
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... Pin = rated input power ( Shunt resistance (W) S The NCP1650 has been designed such that with a 2% current shunt and divider, the RSS error will be 7% maximum worst case error of 14%. In order to assure maximum power output the reference voltage (V be reduced by the error factor ...
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... Voltage Error Amplifier The voltage error amplifier is constrained by the three equations. When this amplifier is compensated with a pole−zero pair, there will be a unity gain pole which will be cancelled by the zero at frequency f bode plot would be: NCP1650 Loop Compensation R V ac1 ac AC ...
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... The equation for the gain is good for frequencies below the pole. There is a single pole due to the output filter. Since the NCP1650 is a current mode converter, the inductor is not part of the output pole as can be seen in that equation. Calculating the Loop Gain ...
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... There are two significant poles in this circuit. The first is on the power multiplier and the second is due to the power error amplifier. Because the pole on the power multiplier is very low, it will normally be necessary to include the resistor (R ) for the zero on this amplifier. 8 NCP1650 V V ref pa ORing NET REFERENCE − ...
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... FREQUENCY (Hz) Figure 46. Power Loop without Power Amp NCP1650 For this example it can be seen that for a bandwidth of 1.0 Hz, the power amplifier needs a gain of –27 dB (0.045 v/v) at 1.0 Hz, with a zero at 0.7 Hz. The zero frequency is chosen to match the pole frequency. Although it is not essential to do this safe method of assuring a stable system ...
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... G K −T− SEATING PLANE 0.25 (0.010 NCP1650 PACKAGE DIMENSIONS SOIC−16 D SUFFIX CASE 751B−05 ISSUE 0.25 (0.010 http://onsemi.com 31 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14 ...
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... The product described herein (NCP1650), may be covered by U.S. patents including 5,502,370, 5,359,281 and 6,373,734. Other patents may be pending. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...