MC74HC595A Motorola, MC74HC595A Datasheet - Page 5

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MC74HC595A

Manufacturer Part Number
MC74HC595A
Description
8-Bit Serial-Input/Serial or Parallel-Output Shift Register with 3-State Outputs
Manufacturer
Motorola
Datasheet

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High–Speed CMOS Logic Data
DL129 — Rev 6
SR = shift register contents
LR = latch register contents
INPUTS
A (Pin 14)
8–bit serial shift register.
CONTROL INPUTS
Shift Clock (Pin 11)
input causes the data at the Serial Input pin to be shifted into
the 8–bit shift register.
Reset (Pin 10)
low on this pin resets the shift register portion of this device
only. The 8–bit latch is not affected.
Reset shift register
Shift data into shift
register
Shift register remains
unchanged
Transfer shift register
contents to latch register
Latch register remains
unchanged
Enable parallel outputs
Force outputs into high
impedance state
Serial Data Input. The data on this pin is shifted into the
Shift Register Clock Input. A low– to–high transition on this
Active–low, Asynchronous, Shift Register Reset Input. A
O
Operation
i
Reset
H
H
H
L
X
X
X
D = data (L, H) logic level
U = remains unchanged
Serial
Input
A
D
X
X
X
X
X
X
L, H,
L, H,
Clock
Inputs
Shift
X
X
X
X
PIN DESCRIPTIONS
FUNCTION TABLE
L, H,
L, H,
L, H,
L, H,
Latch
Clock
X
X
= Low–to–High
= High–to–Low
5
Output
Enable
H
L
L
L
L
L
L
Latch Clock (Pin 12)
input latches the shift register data.
Output Enable (Pin 13)
data from the latches to be presented at the outputs. A high
on this input forces the outputs (Q A –Q H ) into the high–
impedance state. The serial output is not affected by this
control unit.
OUTPUTS
Q A – Q H (Pins 15, 1, 2, 3, 4, 5, 6, 7)
SQ H (Pin 9)
eighth stage of the 8–bit shift register. This output does not
have three–state capability.
Storage Latch Clock Input. A low–to–high transition on this
Active–low Output Enable. A low on this input allows the
Noninverted, 3–state, latch outputs.
Noninverted, Serial Data Output. This is the output of the
SR N
D
Contents
Register
Shift
U
U
L
*
*
*
SR A ;
SR N+1
* = depends on Reset and Shift Clock inputs
** = depends on Latch Clock input
SR N
Resulting Function
Contents
Register
Latch
U
U
U
U
**
**
LR N
SR G
MC54/74HC595A
Output
Serial
SQ H
U
U
L
*
*
*
SR H
MOTOROLA
Q A – Q H
Outputs
Enabled
Parallel
SR N
U
U
U
U
Z

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