MC74LVX4245 Motorola, MC74LVX4245 Datasheet - Page 5

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MC74LVX4245

Manufacturer Part Number
MC74LVX4245
Description
LOW-VOLTAGE CMOS
Manufacturer
Motorola
Datasheet

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4. Typical values at V CCA = 5.0V; V CCB = 3.3V at 25 C.
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
Dual Supply Octal Translating Transceiver
of bidirectional signal voltage translation. This level shifting
ability provides an excellent interface between low voltage
CPU local bus and a standard 5V I/O bus. The device control
inputs can be controlled by either the low voltage CPU and
core logic or a bus arbitrator with 5V I/O levels.
as notebook computers using a 3.3V CPU and 5V peripheral
devices.
Applications:
Mixed Mode Dual Supply Interface Solutions
CMOS devices cannot tolerate I/O levels above their applied
V CC . If an I/O pin of a 3V device is driven by a 5V device, the
P–Channel transistor in the 3V device will conduct — causing
current flow from the I/O bus to the 3V power supply. The
result may be destruction of the 3V device through latchup
effects. A current limiting resistor may be used to prevent
destruction, but it causes speed degradation and needless
power dissipation.
two different output levels that easily handle the dual voltage
interface. The A port is a dedicated 5V port; the B port is a
dedicated 3V port. Figure 4 on page 6 shows how the
LVX4245 may fit into a mixed 3V/5V system.
either use it for bidirectional or unidirectional applications.
The center 20 pins are configured to match a ‘245 pinout.
AC ELECTRICAL CHARACTERISTICS
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
4
t PHL
t PLH
t PHL
t PLH
t PZL
t PZH
t PZL
t PZH
t PHZ
t PLZ
t PHZ
t PLZ
t OSHL
t OSLH
Symbol
The 74LVX4245 is a is a dual–supply device well capable
The LVX4245 is ideal for mixed voltage applications such
The LVX4245 is designed to solve 3V/5V interfaces when
A better solution is provided in the LVX4245. It provides
Since the LVX4245 is a ‘245 transceiver, the user may
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t OSHL ) or LOW–to–HIGH (t OSLH ); parameter
guaranteed by design.
Propagation Delay A to B
Propagation Delay B to A
Output Enable Time OE to B
Output Enable Time OE to A
Output Disable Time OE to B
Output Disable Time OE to A
Output to Output Skew, Data to Output (Note 5.)
Parameter
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
5
This enables the user to easily replace this level shifter with a
3V ‘245 device without additional layout work or re–
manufacture of the circuit board (when both buses are 3V).
Powering Up the LVX4245
V CCB pin is powered–up well in advance of the V CCA pin,
several milliamps of either I CCA or I CCB current will result. If
the V CCA pin is powered–up in advance of the V CCB pin then
only nanoamps of Icc current will result. In actuality the V CCB
can be powered “slightly” before the V CCA without the current
penalty, but this “setup time” is dependent on the power–up
ramp rate of the V CC pins. With a ramp rate of approximately
50mV/ns (50V/ s) a 25ns setup time was observed (V CCB
V CCB = 3.3V 0.3V
T A = –40 to +85 C
V CCA = 5V 0.5V
When powering up the LVX4245, please note that if the
C L = 50pF
(Note 4.)
Typ
5.1
5.3
5.4
5.5
6.5
6.7
5.2
5.8
6.0
3.3
3.9
2.9
1.0
Figure 3. 3.3V/5V Interface Block Diagram
V CCB
V CCA
LOW VOLTAGE CPU LOCAL BUS
LVX4245
Max
10.5
10.5
10.0
9.0
9.0
9.0
9.0
9.5
9.5
7.0
7.5
7.0
1.5
EISA – ISA – MCA
(5V I/O LEVELS)
T A = –40 to +85 C
V CCA = 5V 0.5V
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
V CCB
V CCA
V CCB = 2.7V
C L = 50pF
LVX4245
MC74LVX4245
Max
10.0
10.0
10.0
10.0
10.0
10.0
10.0
11.5
11.5
7.5
7.5
7.5
1.5
MOTOROLA
Unit
ns
ns
ns
ns
ns
ns
ns

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