UPD16435A NEC, UPD16435A Datasheet - Page 16

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UPD16435A

Manufacturer Part Number
UPD16435A
Description
DOT MATRIX LCD CONTROLLER/DRIVER
Manufacturer
NEC
Datasheet
16
After powering on
(14) Control Register (Register Address = 1100B)
Note
Performs address increment direction, common output, frame frequency, blinking, and master/slave setting.
MSB
b7 b6
0
CGRAM is incremented in the Y direction even if 00H is set.
0
b5
0
b4 b3 b2 b1 b0
0
0
0
0
LSB
0
Address increment direction setting
When auto increment is used, the address is automatically
up-counted after a full-dot, character, or CGRAM
The character X address is reset to 13H.
When address retention is specified, the address is retained
after a data write.
Common output setting
Frame frequency setting
LCD drive is performed by frame inversion.
Blink source setting
Master/slave setting
00: Auto increment in X direction (up-count)
01: Auto increment in Y direction (up-count)
1 : Address retention
00: 35 outputs (1/35 duty, COM
01: 37 outputs (1/37 duty, COM
10: 71 outputs (1/71 duty, COM
11: 73 outputs (1/73 duty, COM
00: 100 Hz
01: 75 Hz
10: 50 Hz
11: Don’t Care
0: External clock (OSC3)
1: Internal scaled block
: Don’t Care
0: Master
1: Slave
2
1
2
1
to COM
to COM
to COM
to COM
36
37
72
73
selected)
selected)
selected)
selected)
Note
data write.
PD16435, 16435A

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