UPD78F0138 NEC, UPD78F0138 Datasheet - Page 403

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

21.4 Operation of Clock Monitor
This section explains the functions of the clock monitor. The monitor start and stop conditions are as follows.
<Monitor start condition>
<Monitor stop condition>
Note The Ring-OSC clock is stopped only when the “Ring-OSC can be stopped by software” is selected by a
The clock monitor timing is as shown in Figure 21-3.
CPU Operation Clock
X1 input clock
Ring-OSC clock
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to operation enabled (1).
• Reset is released and during the oscillation stabilization time
• In STOP mode and during the oscillation stabilization time
• When the X1 input clock is stopped by software (MSTOP = 1 or MCC = 1) and during the oscillation
• When the Ring-OSC clock is stopped
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
stabilization time
mask option. If “Ring-OSC cannot be stopped” is selected, the Ring-OSC clock cannot be stopped.
MCC:
Table 21-2. Operation Status of Clock Monitor (When CLME = 1)
STOP mode
RESET input
Normal operation mode
HALT mode
STOP mode
RESET input
Normal operation mode
HALT mode
Bit 7 of the processor clock control register (PCC)
Operation Mode
CHAPTER 21 CLOCK MONITOR
User’s Manual U16228EJ2V0UD
Stopped
Oscillating
Stopped
Oscillating
Stopped
X1 Input Clock Status
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Ring-OSC Clock Status
Note
Note
Note
Stopped
Operating
Stopped
Stopped
Operating
Stopped
Clock Monitor Status
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