UPD78F9418A NEC, UPD78F9418A Datasheet - Page 272

• Manufacturer Part Number: UPD78F9418A
• Description: (UPD7894xxA) 8-Bit Single Chip Microcontrollers
• Manufacturer: NEC

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272
SUBC
AND
OR
XOR
Mnemonic
Remark
One instruction clock cycle is one CPU clock cycle (f
register (PCC).
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL+byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL+byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL+byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL+byte]
Operands
CHAPTER 20 INSTRUCTION SET
Bytes
User’s Manual U13952EJ3V0UD
2
3
2
2
3
1
2
2
3
2
2
3
1
2
2
3
2
2
3
1
2
2
3
2
2
3
1
2
Clocks
4
6
4
4
8
6
6
4
6
4
4
8
6
6
4
6
4
4
8
6
6
4
6
4
4
8
6
6
A, CY ← A − byte − CY
(saddr), CY ← (saddr) − byte − CY
A, CY ← A − r − CY
A, CY ← A − (saddr) − CY
A, CY ← A − (addr16) − CY
A, CY ← A − (HL) − CY
A, CY ← A− (HL + byte) − CY
A ← A ∧ byte
(saddr) ← (saddr) ∧ byte
A ← A ∧ r
A ← A ∧ (saddr)
A ← A ∧ (addr16)
A ← A ∧ (HL)
A ← A ∧ (HL + byte)
A ← A ∨ byte
(saddr) ← (saddr) ∨ byte
A ← A ∨ r
A ← A ∨ (saddr)
A ← A ∨ (addr16)
A ← A ∨ (HL)
A ← A ∨ (HL + byte)
A ← A V byte
(saddr) ← (saddr) V byte
A ← A V r
A ← A V (saddr)
A ← A V (addr16)
A ← A V (HL)
A ← A V (HL + byte)
CPU
) selected by the processor clock control
Operation
Z AC CY
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Flag
x
x
x
x
x
x
x
x
x
x
x
x
x
x