IDT72211L15J IDT, Integrated Device Technology Inc, IDT72211L15J Datasheet - Page 7

• Manufacturer Part Number: IDT72211L15J
• Description: IC FIFO 512X9 SYNC 15NS 32-PLCC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT72211L15J

• Function: Synchronous
• Memory Size: 4.6K (512 x 9)
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Rate: -
• Other names: 72211L15J

OUTPUTS:
FULL FLAG (FF)
device is full. If no reads are performed after Reset (RS), the Full Flag (FF)
will go LOW after 64 writes for the IDT72421, 256 writes for the IDT72201, 512
writes for the IDT72211, 1,024 writes for the IDT72221, 2,048 writes for the
IDT72231, 4,096 writes for the IDT72241, and 8,192 writes for the IDT72251.
transition of the Write Clock (WCLK).
EMPTY FLAG (EF)
the read pointer is equal to the write pointer, indicating the device is empty.
transition of the Read Clock (RCLK).
PROGRAMMABLE ALMOST-FULL FLAG (PAF)
reaches the almost-full condition. If no reads are performed after Reset (RS),
the Programmable Almost-Full flag (PAF) will go LOW after (64-m) writes for the
IDT72421, (256-m) writes for the IDT72201, (512-m) writes for the IDT72211,
TABLE 1 — STATUS FLAGS
NOTES:
1. n = Empty Offset (n = 7 default value)
2. m = Full Offset (m = 7 default value)
©
IDT72421/72201/72211/72221/72231/72241/72251 CMOS SyncFIFO™
64 x 9, 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
The Full Flag (FF) will go LOW, inhibiting further write operation, when the
The Full Flag (FF) is synchronized with respect to the LOW-to-HIGH
The Empty Flag (EF) will go LOW, inhibiting further read operations, when
The Empty Flag (EF) is synchronized with respect to the LOW-to-HIGH
The Programmable Almost-Full flag (PAF) will go LOW when the FIFO
(n+1) to (1,024-(m+1))
(1,024-m)
IDT72221
1 to n
(n+1) to (64-(m+1))
1,024
(64-m)
0
(2)
IDT72421
(1)
to 1,023
1 to n
64
0
(2)
to 63
(1)
(n+1) to (2,048-(m+1))
(2,048-m)
IDT72231
1 to n
2,048
NUMBER OF WORDS IN FIFO
NUMBER OF WORDS IN FIFO
0
(2)
(1)
to 2,047
(n+1) to (256-(m+1))
(256-m)
IDT72201
1 to n
256
0
(2)
to 255
(n+1) to (4,096-(m+1))
(4,096-m)
(1)
IDT72241
1 to n
4,096
0
(2)
(1)
to 4,095
7
(1,024-m) writes for the IDT72221, (2,048-m) writes for the IDT72231, (4,096-
m) writes for the IDT72241, and (8,192-m) writes for the IDT72251. The offset
“m” is defined in the Full offset registers.
will go LOW at Full-7 words.
the LOW-to-HIGH transition of the Write Clock (WCLK).
PROGRAMMABLE ALMOST-EMPTY FLAG (PAE)
pointer is "n+1" locations less than the write pointer. The offset "n" is defined
in the Empty Offset registers. If no reads are performed after Reset the
Programmable Almost-Empty flag (PAE) will go HIGH after "n+1" for the
IDT72421/72201/72211/72221/72231/72241/72251.
(PAE) will go LOW at Empty+7 words.
to the LOW-to-HIGH transition of the Read Clock (RCLK).
DATA OUTPUTS (Q
If there is no Full offset specified, the Programmable Almost-Full flag (PAF)
The Programmable Almost-Full flag (PAF) is synchronized with respect to
The Programmable Almost-Empty flag (PAE) will go LOW when the read
If there is no Empty offset specified, the Programmable Almost-Empty flag
The Programmable Almost-Empty flag (PAE) is synchronized with respect
Data outputs for a 9-bit wide data.
(n+1) to (512-(m+1))
(512-m)
(n+1) to (8,192-(m+1))
(8,192-m)
IDT72211
1 to n
512
IDT72251
0
(2)
1 to n
8,192
to 511
(1)
0
(2)
0
- Q
(1)
to 8,191
8
)
COMMERCIAL AND INDUSTRIAL
FF
FF
H
H
H
H
H
H
H
H
L
L
TEMPERATURE RANGES
PAF
PAF
H
H
H
H
H
H
L
L
L
L
OCTOBER 22, 2008
PAE
PAE
H
H
H
H
H
H
L
L
L
L
EF
EF
H
H
H
H
H
H
H
H
L
L