I2C-Interface Philips Semiconductors / NXP Semiconductors, I2C-Interface Datasheet

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I2C-Interface

Manufacturer Part Number
I2C-Interface
Description
Programming the 12C Interface
Manufacturer
Philips Semiconductors / NXP Semiconductors
Datasheet
vtces desIgned
with other processor.
ductor),
cently Echelon’s INeuron chps. In all cas-
es, the goal is the same: to reduce the
wiring and pmcount necessary for a par-
allel data bus. It simply does not make
Mitch 1s a senior strategzc development
tween
Many semconductor
include
enguzeer for Intel and can be contact-
ed at 5000
dler AZ 85226
Philips Semiconductors
T
eral advantages
al interfaces
RS-232. Among
of 1% are multimaster
matic baud-rate
Jnd-play
Amencan engmeers
hit with an abundance
I say Amencan
tll recently the 12C bus was pnmanly
European
year,
Unite ,d States has risen dramatIcally.
Embe tdded systems
zmg
mgs-afforded
protocols.
zntel.com
ligent IC devices. The 1% bus offers sev-
The idea of serial Interconnect
,Mention the 1% bus to a group
12C Specific information
the cost. soace.
however,
integrated
Microwire
commumcation
he Inter-Integrated
(“1% Bus” for short) IS a two-
wire, synchronous,
face
SPI (~Motorolaj, and most re-
phenomenon.
network
W Chandler
by’robust
designed
such
to ?alk” via serial links
engmeers
or at mkabn@sedona.
adjustment,
the advanced
over ,.traditlonal”
Interest
clrcults
(Xatlonai
extensions.
and you’ll likely get
as LMicrowlre and
designers
vendors
Current exampies
and Dower sav-
operauon,
of blank stares.
se&l
between
Withm the last
pnmanly
m I‘C in the
Blud.. Cban-
because
IS not new.
serial inter-
Circuit Bus
and .‘plug-
Semcon-
When
mterchip
offer de-
are real-
features
auto-
intel-
seri-
un-
be-
for
of
a
intedigent devices need to communicate
cludes use of these architectures,
came about
challenge
of our managers
a consultant
er tar the Intel 8OCl86EB
processor.
economic
parallel bus to a slow penpherai.
capable
protocol
ture. For example,
chltectures
port. If your choice of architecture
your only opuon
protocol
1% protocol
The sobare
Unfortunately
EMBEDDED SYSTEMS
devices,
wdl dictate the CPU architec-
in software.
during a staff meetmg.
Being somewhat
sense
Mitchell Kahn
implement
to write a software 1% driv-
as a result of an ~mphclt
discussed
lmpiementatlon
proposed
to route a full-speed
for most serlal-bus-
the choice
IS to tmpiement
onlv two CPU ar-
an on-chip
m this article
69
that we hire
embedded
new to the
of a bus
of the
then
One
pre-
the
1%
Programming the 12C Interface
curacvj
sledgehammer
ummg accuracv. The declslon to use as-
sembly tnstead of a high-level language
stemmed drectly from the need to con-
trol program-execunon
ther the tme nor the m&anon
tune high-level
sembly language,
lem: Could I make the code portable?
Intel offers a plethora
bedded-controller
it be possible to make the code some-
what portable
sembiv languages?
m the use of macros.
Three distmct tasks are mvolved m im-
of time, and driving the
came apparent
with creatmg the bus waveforms
normally
8OCl86EB’s on-chip timers. I could not,
however.
my code would be able to spare a urner
for the software 12C prt.
the elegance
timing loops. Luchlv,
IS extremely
verballv!) to his suggestIon.
of intense hacking later, I presented
dnver for general distnbutlon.
Design Tmde-offs
plementmg
the bus, waltmg for a spectiic amount
byte of a typical bus transaction:
Figure
group.
first prototype of the driver. My reward?
1
got to write a generic
Havmg made the decision
I took excepuon
1. The time delays
of the on-chip
Dr Dobb j-journal.
assume that the end users of
have been
the 12C protocol:
forglvmg
(and to some extent
between
code.
approach
when
I
architectures.
faced mv neaxt prob-
I found mv answer
relegated
the IlC protocol
ot CPU and em-
I flowcharted
time. I had ne;-
with regard
I had to forego
timers for the
version
(although
disparate
bus.
of software
.A weekend
associated
_fune 1992
to use as-
watching
This be-
to hand-
Would
would
to the
of the
see
as-
not
ac-
the
to
1

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I2C-Interface Summary of contents

Page 1

Philips Semiconductors 12C Specific information intedigent devices need to communicate When T he Inter-Integrated Circuit Bus (“1% Bus” for short two- wire, synchronous, serial inter- face designed pnmanly for commumcation between intel- ligent IC devices. The 1% bus ...

Page 2

Philips Semiconductors l*C Specific information AH the basic bu1ldmg blocks of thj I? protocol (watching, welting, and dc In9 can be compartmentalized into dk tmct macros. The algorithms that makl up the IlC driver are written with thesg macros as ...

Page 3

Philips Semiconductors 12C Specific information I polling of the SCL line that gives rise an importanc feature of 12C: automatit bit-by-bit baud-rate adjustment. Any df vice on the IzC bus may hoid the clot line low m order to stall ...

Page 4

Philips Semiconductors 12C Specific information the bu5 non on j The ma5ter broxica5ts the 5iave ad- dress md aspects XI ‘\CK from th .iddre55ed slave + The master recene5 0 or more bvte ot dam and \ends < ...

Page 5

Specific information erial data buses are a well- S proven tool in embedded systems. When you are com- municating with slow per- ipheral devices, serial buses are often often more convenient and less expensive than parallel buses. Addi- tionally, ...

Page 6

Semiconductors l*C Specific information Exploriizg 2 IC dressed. The added wiring offers no and the bus advantage to developers, of- fers nothing towards achievmg multi- pie-mastermg capabilities. One of the more versattle options available to developers IS the PC ...

Page 7

Philips Semiconductors l*C Specific information pullup reststor is external. Open-collector (actually, they are CMOS. so &open dram” is more appro- priate) contiguratron means that the output stage can only pull the node to ground. A passive resistor pulls the node ...

Page 8

Philips Semiconductors l*C Specific information Expbriig 2 IC ing as examples, the address is OlOOxxx. The xxx indicates the address selected by the state of the three address pins on the peripheral. PC serial transactions are always eight bits of ...

Page 9

Philips Semiconductors l*C Specific information Bit-Banging Serial Posts T hey say that necesstty IS the mother of inventron. and it certainly seems to be the case in embedded systems work. No sooner do you accomplish the tmposstble in one project ...

Page 10

Philips Semiconductors i*C Specific information The structures are referenced con- secutlvely. Each gves the source of a bit to be transmitted and a flag to indicate whether the pointer should be increased to point to a new bit. The transmission ...

Page 11

Philips Semiconductors l*C Specific information I internal RL41M. (Since was using the small model, this would have been the default storage anyway.) Index entry The in each structure al- lows the serial bit to be selected from an array of ...

Page 12

Philips Semiconductors 12C Specific information The previous transmitting code corn- plies. with only a Me manual assls- tance, to: TransEit = (bit)( transnnt BR_ptr-Findex BR_ptr-Unask ) WV DPL.BR_ptr+OlH MIV 0PH,Bfl_!~tr CLR A A.@A+DPlR WC ADD A,ntransmit KIV RO ...

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