MCP40D17 Microchip Technology Inc., MCP40D17 Datasheet - Page 40

• Manufacturer Part Number: MCP40D17
• Description: 7-bit Single I 2 C? With Command Code Digital Pot With Volatile Memory In Sc70
• Manufacturer: Microchip Technology Inc.

MCP40D17/18/19
FIGURE 5-15:
FIGURE 5-16:
DS22152B-page 40
S
Note 1: Master Device is responsible for ACK / NACK signal. If a NACK signal occurs, the MCP40D17/18/19 will
0 1 0
S
Slave Address Byte
2: The Master Device will Not ACK, and the MCP40D17/18/19 will release the bus so the Master Device can
Read 1 Byte with Command Code = 00h
Read 2 Byte with Command Code = 00h
Master
MCP40D17/18/19
I
Master
MCP40D17/18/19
I
Master
MCP40D17/18/19
I
Master
MCP40D17/18/19
I
2
2
2
2
0 1
C Bus
C Bus
C Bus
C Bus
abort this transfer and release the bus.
generate a Stop or Repeated Start condition.
Slave Address Byte
1
0 1
1
I
I
2
2
C Read Command Format (Slave Address = “0101110”).
C Read Communication Behavior (Slave Address = “0101110”).
1 0 0
1 1
S Slave Address
S 0 1 0 1 1 1 0 0 1 0 0 0 0 0 0 0 0 1 S 0 1 0 1 1 1 0 1 1
S 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 S 0 1 0 1 1 1 0 1 0
S Slave Address
S 0 1 0 1 1 1 0 0 1 0 0 0 0 0 0 0 0 1 S 0 1 0 1 1 1 0 1 1
S 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 S 0 1 0 1 1 1 0 1 0
0 1
A
Read/Write bit (“0” = Write)
0 0
A
Read/Write bit (“1” = Read)
Command Code
0 D6 D5 D4
0 0
R
/
W
R
/
W
Data Byte
0
A
C
K Command Code
0
A
C
K Command Code
0
Data Byte
0 d d d d d d d 1
0 d d d d d d d 1 P
Data Byte
0 d d d d d d d 1 0 d d d d d d d 1
0 d d d d d d d 0 0 d d d d d d d 1 P
0
D3
0 0 A
D2 D1 D0 A
(2)
STOP bit
P
A
C
K
0
A
C
K P
1 P
A
C
K
0
A
C
K Data Byte
0
R
S Slave Address
R
S Slave Address
Legend
© 2009 Microchip Technology Inc.
S = Start Condition
P = Stop Condition
A = Acknowledge
X = Don’t Care
R/W = Read/Write bit
D6:D0 = Data bits
R
/
W
R
/
W
A
C
K P
1 P
A
C
K
0
A
C
K
0