LM3S6918 Luminary Micro, Inc, LM3S6918 Datasheet - Page 123

• Manufacturer Part Number: LM3S6918
• Description: Lm3s6918 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

7.1
7.2
7.2.1
July 26, 2008
Block Diagram
Figure 7-1. Hibernation Module Block Diagram
Functional Description
The Hibernation module controls the power to the processor with an enable signal (HIB) that signals
an external voltage regulator to turn off. The Hibernation module power is determined dynamically.
The supply voltage of the Hibernation module is the larger of the main voltage source (VDD) or the
battery/auxilliary voltage source (VBAT). A voting circuit indicates the larger and an internal power
switch selects the appropriate voltage source. The Hibernation module also has a separate clock
source to maintain a real-time clock (RTC). Once in hibernation, the module signals an external
voltage regulator to turn back on the power when an external pin (WAKE) is asserted, or when the
internal RTC reaches a certain value. The Hibernation module can also detect when the battery
voltage is low, and optionally prevent hibernation when this occurs.
Power-up from a power cut to code execution is defined as the regulator turn-on time (specified at
t
Register Access Timing
Because the Hibernation module has an independent clocking domain, certain registers must be
written only with a timing gap between accesses. The delay time is t
must guarantee that a delay of t
HIB_TO_VDD
XOSC0
XOSC1
WAKE
VDD
VBAT
maximum) plus the normal chip POR (see “Hibernation Module” on page 507).
HIBCTL.CLKSEL
HIBCTL.CLK32EN
Non-Volatile
HIBDATA
Memory
/128
HIBCTL.LOWBATEN
HIB_REG_WRITE
Preliminary
RTC
Low Battery
Pre-Divider
HIBRTCLD
HIBRTCM0
HIBRTCM1
HIBRTCC
HIBRTCT
Detect
is inserted between back-to-back writes to certain
HIBCTL.PWRCUT
HIBCTL.RTCWEN
HIBCTL.EXTWEN
HIBCTL.VABORT
MATCH0/1
LOWBAT
HIB_REG_WRITE
Sequence
HIBIM
HIBRIS
HIBMIS
HIBIC
Interrupts
Power
Logic
LM3S6918 Microcontroller
, therefore software
Interrupts
to CPU
HIB
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