LM3S8971 Luminary Micro, Inc, LM3S8971 Datasheet - Page 490

no-image

LM3S8971

Manufacturer Part Number
LM3S8971
Description
Lm3s8971 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S8971-EQC50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S8971-EQC50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S8971-IBZ50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S8971-IBZ50-A2
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
LM3S8971-IBZ50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S8971-IQC50-A2
Manufacturer:
TI
Quantity:
141
Part Number:
LM3S8971-IQC50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Reset
Reset
Type
Type
Pulse Width Modulator (PWM)
PWM Raw Interrupt Status (PWMRIS)
Base 0x4002.8000
Offset 0x018
Type RO, reset 0x0000.0000
490
Bit/Field
31:17
15:3
16
2
1
0
RO
RO
31
15
0
0
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018
This register provides the current set of interrupt sources that are asserted, regardless of whether
they cause an interrupt to be asserted to the controller. The fault interrupt is latched on detection;
it must be cleared through the PWM Interrupt Status and Clear (PWMISC) register (see page 491).
The PWM generator interrupts simply reflect the status of the PWM generators; they are cleared
via the interrupt status register in the PWM generator blocks. Bits set to 1 indicate the events that
are active; zero bits indicate that the event in question is not active.
RO
RO
30
14
0
0
IntPWM2
IntPWM1
IntPWM0
reserved
reserved
RO
RO
29
13
IntFault
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
26
10
0
0
reserved
Reset
0x00
0x00
RO
RO
25
0
9
0
0
0
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Fault Interrupt Asserted
Indicates that the fault input is asserting.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM2 Interrupt Asserted
Indicates that the PWM generator 2 block is asserting its interrupt.
PWM1 Interrupt Asserted
Indicates that the PWM generator 1 block is asserting its interrupt.
PWM0 Interrupt Asserted
Indicates that the PWM generator 0 block is asserting its interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
IntPWM2
RO
RO
18
0
2
0
IntPWM1
July 26, 2008
RO
RO
17
0
1
0
IntPWM0
IntFault
RO
RO
16
0
0
0

Related parts for LM3S8971