LM3559TLX National Semiconductor Corporation, LM3559TLX Datasheet - Page 30

• Manufacturer Part Number: LM3559TLX
• Description: Synchronous Boost Flash Driver With Dual 900 Ma High Side Current Sources 1.8a Total Flash Current
• Manufacturer: National Semiconductor Corporation

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Bit 7
(Not
Used)
N/A
GPIO REGISTER
The GPIO register contains the control bits which change the
state of the TX1/TORCH/GPIO1 pin and the TX2/INT/GPIO2
pins to general purpose I/O’s (GPIO’s). Additionally, bit 6 of
this register contains the interrupt configuration bit.
describes the bit description and functionality of the GPIO
register. To configure the TX1 or TX2 pins as GPIO outputs
an initial double write is required to register 0x20. For exam-
ple, to configure TX2 to output a logic high, an initial write of
0xB8 would need to occur twice, to force GPIO2 low. Subse-
quent writes to GPIO2 after the initial set-up only requires a
Bit 6
(TX2/INT/GPIO2
Interrupt
Enable)
0 = TX2/INT/
GPIO2 is
configured
according to bit 3
of this register
(default)
1 = with bits [4:3]
= 11, TX2/INT/
GPIO2 is an
interrupt output.
See Interrupt
section.
Bit 5
(TX2/INT/
GPIO2 data)
This bit is the
read or write
data for the
GPIO2 pin in
GPIO mode
Bit 4
(TX2/INT/
GPIO2 data
direction)
0 = TX2/INT/
GPIO2 is a
GPIO Input
(default)
1 = TX2/INT/
GPIO2 is a
GPIO Output
TABLE 9. GPIO Register
Table 9
Bit 3
(TX2/INT/
GPIO2
Control)
0 = TX2/INT/
GPIO is a TX2
interrupt
(default)
1 = TX2/INT/
GPIO2 is
configured as a
GPIO
30
single write. To read back the GPIO inputs, a write, then a
read, of register 0x20 must occur each time the data is read.
For example, if GPIO2 is set up as a GPIO input and the
GPIO2 input has then changed state, first a write to 0x20 must
occur, then the following readback of register 0x20 will show
the updated data. When configuring TX2 as an interrupt out-
put, the TX2/GPIO2/INT pin must first be configured as a
GPIO output (double write). For example, to configure TX2/
GPIO2/INT for INT mode, a write of 0xF8 to register 0x20
must be done twice.
Bit 2
(TX1/TORCH/
GPIO1 data)
This bit is the
read or write
data for the
GPIO1 pin in
GPIO mode
Bit 1
(TX1/TORCH/
GPIO1 data
direction)
0 = TX1/
TORCH/GPIO1
is a GPIO input
(default)
1 TX1/
TORCHGPIO1
is an output
Bit 0
(TX1/TORCH/
GPIO1
Control)
0 = TX1/
TORCH/
GPIO1 pin is
configured
according to
Configuration
Register 1 bit
[7] (default)
1 = TX1/
TORCH/
GPIO1 pin is
configured as a
GPIO