CS8120YD14 Cherry Semiconductor Corporation, CS8120YD14 Datasheet - Page 5

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CS8120YD14

Manufacturer Part Number
CS8120YD14
Description
5V/ 300mA Linear Regulator with and ENABLE RESET
Manufacturer
Cherry Semiconductor Corporation
Datasheet

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If the input voltage rises above 26V (e.g. load dump), the
output shuts down. This response protects the internal cir-
cuitry and enables the IC to survive unexpected voltage
transients.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
Should the junction temperature of the power device
exceed 180ûC (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle heat
source in the IC.
The CS8120 contains two microprocessor compatible con-
trol functions:
on the
transistor turns off, leaving a high impedance facing the
load. The IC will remain in Sleep mode, drawing only
250µA, until the voltage on the lead drops below 2.1V typ.
Hysteresis (800mV) is built into the
Figure 3: Circuit Waveforms for CS8120
The circuit depicted in Figure 5 lets the microprocessor
control its power source, the CS8120 regulator. An I/O
port on the µP and the SWITCH port are used to drive the
base of Q1. When Q1 is driven into saturation, the voltage
on the
regulatorÕs output is switched out. When the drive cur-
rent is removed, the voltage on the
the output is switched off and the IC moves into Sleep
mode where it draws 250µA.
By coupling these two controls with
has added flexibility. Once the system is running, the
state of the SWITCH is irrelevant as long as the I/O port
continues to drive Q1. The µP can turn off its own power
ENABLE
ENABLE
RESET
V
OUT
V
IN
ENABLE
ENABLE
switches the output transistor. When the voltage
V
IN(HI)
V
V
RT(OFF)
RT(ON)
Regulator Control Functions
VR
H
ENABLE
LO
HI
PEAK
lead exceeds 2.9V typ, the output pass
lead falls below its lower threshold. The
ENABLE
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
FOR 7V < V
and
VR
(1)
SAT
RESET
(2)
Function
IN
< 26V
ENABLE
ENABLE
(Figure 3).
ENABLE
Circuit Description: continued
lead rises,
function to
, the system
VR
PEAK
Applications Notes
5
provide good noise immunity.
A
ers up (V
regulation (V
is included in the function to minimize oscillations.
The
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
Figure 4: RC Network for
guaranteeing that the
as 1V.
An external RC network on the
vides a sufficiently long delay for most microprocessor
based applications. RC values can be chosen using the fol-
lowing formula:
where:
by withdrawing drive current, once the SWITCH is open.
This software control at the I/O port allows the µP to fin-
ish key housekeeping functions before power is removed.
The logic options are summarized in Table 1 below
RESET
µP I/O drive
RESET
CS–8120
ON
OFF
R
Table 1: Logic Control of CS8120 Output
OUT
signal (low voltage) is generated as the IC pow-
TOT
R
R
C
t
V
(0.7V @ turn - on), and
V
Delay
TOT
IN
RST
RST
T
output is an open collector NPN transistor,
> V
OUT
´ C
= µP port impedance,
=
= R
RESET
OUT
RESET
RST
= desired delay time,
= V
= µP logic threshold voltage.
< V
V
RST
OUT
- 100mV) or when V
OUT
SAT
[
SWITCH
RESET
ln
Closed
Open
Closed
Open
RESET
RESET
in parallel with R
of
delay capacitor,
- 140mV, typ). 40mV of hysteresis
(
RESET
V
Delay circuitry
V
Function
R
Ðt
signal is valid for V
RST
RST
T
Delay
C
Ð V
RESET
RST
ENABLE
Ð V
lead
OUT
LOW
LOW
LOW
HIGH
OUT
IN,
lead (Figure 4) pro-
OUT
)
]
drops out of
C
22mF
2
Output
OUT
ON
ON
ON
OFF
to mP
RESET
Port
5V to mP
and
System
Power
as low

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