CS81 FUJITSU [Fujitsu Component Limited.], CS81 Datasheet

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CS81

Manufacturer Part Number
CS81
Description
Semicustom CMOS Standard cell
Manufacturer
FUJITSU [Fujitsu Component Limited.]
Datasheet

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FUJITSU SEMICONDUCTOR
Copyright©1999-2007 FUJITSU LIMITED All rights reserved
Semicustom
CMOS
Standard cell
CS81 Series
■ DESCRIPTION
■ FEATURES
The CS81 series 0.18 µm CMOS standard cell is a line of highly integrated CMOS ASICs featuring high speed
and low power consumption.
This series incorporates up to 40 million gates which have a gate delay time of 11 ps, resulting in both integration
and speed about three times higher than conventional products.
In addition, CS81 can operate at a power-supply voltage of down to 1.1 V, substantially reducing power consump-
tion.
• Technology
• Supply voltage
• Junction temperature range : −40 to +125 °C
• Gate delay time
• Gate power consumption : P
• Support for high speed (62.2 Mbps to 780 Mbps, 2.5 Gbps to 3.125 Gbps) interface macros for transmission
• Output buffer cells with noise reduction circuits
• Inputs with on-chip input pull-up/pull-down resistors (33 kΩ typical) and bidirectional buffer cells
• Buffer cells dedicated to crystal oscillators
• Special interfaces (P-CML, LVDS, PCI, AGP, USB, SDRAM-I/F, SSTL, and others. including those under
• IP macros (CPU (FR, ARM7, ARM9), DSP, PCI, IEEE1394, USB, IrDA, PLL, ADC, DAC, and others. including
• Capable of incorporating compiled cells (RAM/ROM/multiplier, and others.)
• Configurable internal bus circuits
• Advanced hardware/software co-design environment
• Short-term development using a timing driven layout tool
• Support for static timing sign-off
DATA SHEET
development)
those under development)
Dramatically reducing the time for generating test vectors for timing verification and the simulation time
: 0.18 µm silicon-gate CMOS, 3- to 6-layer wiring capable of integrating a mixture of high-
: +1.8 V ± 0.15 V (normal) to +1.1 V ± 0.1 V
: t
speed processes and cells on a single chip (under development)
pd
= 11 ps (1.8 V, inverter, F/O = 1)
d
= 5 nW/MHz/BC (1.1 V, 2-NAND, F/O = 1)
DS06-20206-5E
(Continued)

Related parts for CS81

CS81 Summary of contents

Page 1

... Standard cell CS81 Series ■ DESCRIPTION The CS81 series 0.18 µm CMOS standard cell is a line of highly integrated CMOS ASICs featuring high speed and low power consumption. This series incorporates million gates which have a gate delay time of 11 ps, resulting in both integration and speed about three times higher than conventional products ...

Page 2

... CS81 Series (Continued) • Hierarchical design environment for supporting large-scale circuits • Simulation (before layout) considering the input slew rate and detailed RC delay calculation (after layout) , supporting development with minimized timing trouble after trial manufacture • Support for memory (RAM/ROM) SCAN • ...

Page 3

... COMPILED CELLS Compiled cells are macro cells which are automatically generated with the bit/word configuration specified. The CS81 series has the following types of compiled cells. (Note that each macro is different in word/bit range depending on the column type.) 1. Clock synchronous single-port RAM (1 address : 1 RW) • ...

Page 4

... CS81 Series ■ ABSOLUTE MAXIMUM RATINGS Parameter Supply voltage* 1 Input voltage* 1 Output voltage* 1 Storage temperature Junction temperature Output current* 4 Input signal transmitting rate Output signal transmitting rate Output load capacitance Supply pin current = Internal gate part in case of single power supply or dual power supply *3 : I/O part in case 3 ...

Page 5

... +1.5 V ± 0 +1.1 V ± 0.1 V) DDI Value Symbol Min Typ V 3.0 3.3 DDE 1.0 1.1 V DDI 1.4 1.5 ⎯ V 2.0 IH −0.3 ⎯ −40 ⎯ CS81 Series = Unit Max 1. 0 × 0. +125 ° Unit Max 1.95 V 3.6 + 0.3 V DDI V + 0.3 V DDE × ...

Page 6

... CS81 Series = +2.5 V ± 0 • Dual power supply (V DDE Parameter Supply voltage 1.8 V CMOS “H” level input voltage 2.5 V CMOS 1.8 V CMOS “L” level input voltage 2.5 V CMOS Junction temperature = +2.5 V ± 0 • Dual power supply (V DDE Parameter Supply voltage “H” level input voltage 2.5 V CMOS “ ...

Page 7

... OL OL Input leakage current I L Pull up/Pull down Pull resistance Pull down For details of YS, YI, B frame of CS81 series, contact Fujitsu • Dual power supply : V DDE = 3.3 V ± 0 1.8 V ± 0. 1.5 V ± 0 1.1 V ± 0 DDE DDI Parameter Symbol ...

Page 8

... V OH2 V OL3 “L” level output voltage V OL2 Input leakage current I L Pull up/Pull down R P resistance * : For details of YS, YI, B frame of CS81 series, contact Fujitsu 1 1 1.1 V DDI Conditions Min ⎯ ⎯ = −100 µA 2.5 V Output DDE = −100 µA 1.8 V Output I ...

Page 9

... CS81 Series = +125 ° 3 +25 ° 3 −40 ° 3 Max Typ Min 2.0 3.0 4.0 V (V) OL Max Typ Min 2.0 3.0 4 ...

Page 10

... CS81 Series 2. AC characteristics Parameter Symbol Delay time Delay time = propagation delay time, enable time, disable time *2 : “typ” is calculated based on the cell specifications Measurement conditions. Measurement condition = 1.8 V±0. 1.5 V±0. 1.1 V±0. ...

Page 11

... PACKAGES The table below lists the package types available. Consult Fujitsu for the combination of each package and the time of availability. Package TAB-BGA EBGA HQFP TQFP LQFP FBGA FCBGA CS81 Series Pin count 304 352 480 560 660 720 576 660 672 ...

Page 12

... CS81 Series FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device ...

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