TS68EN360MAB Atmel Corporation, TS68EN360MAB Datasheet - Page 20

• Manufacturer Part Number: TS68EN360MAB
• Description: 32-bit Communication Controller, 25 or 33 MHz
• Manufacturer: Atmel Corporation

Table 7-6.
20
Number
31B
31
21A
25A
27B
29A
30A
21
24
25
27
28
29
30
35
23A
23B
27A
31A
39A
20
22
23
26
32
33
34
37
39
46
(5)(15)
(5)(14)
(10)
(12)
(12)
(15)
(18)
(4)
(4)
(6)
(11)
(13)
(14)
(4)
(4)
TS68EN360
Characteristic
CLKO1 High to R/W Low
R/W High to AS, CSx, OE Asserted
R/W High to CSx Asserted
R/W Low to DS Asserted (Write)
CLKO1 High to Data-Out
CLKO1 High to Parity Valid
Parity Valid to CAS Low
Data-Out, Parity-Out Valid to Negating Edge of AS,
CSx, WE, (Fast Termination Write)
DS, CSX, WE Negated to Data-Out, Parity-Out
Invalid (Data-Out, Parity-Out Hold)
CSx Negated to Data-Out, Parity-Out Invalid (Data-
Out, Parity-Out Hold)
Data-Out, Parity-Out Valid to DS Asserted (Write)
Data-In, Parity-In to CLKO1 Low (Data-Setup)
Data-In, Parity-In Valid to CLKO1 Low (Data-Setup)
Late BERR, HALT, BKPT Asserted to CLKO1 Low
(Setup Time)
AS, DS Negated to DSACKx, BERR, HALT
Negated
DS, CSx, OE, Negated to Data-In Parity-In Invalid
(Data-In, Parity-In Hold)
DS, CSx, OE Negated to Data-In High Impedance
CLKO1 Low to Data-In, Parity-In Invalid (Fast
Termination Hold)
CLKO1 Low to Data-In High Impedance
DSACKx Asserted to Data-in, Parity-In Valid
DSACKx Asserted to DSACKx Valid (Skew)
DSACKx Asserted to Data-in, Parity-In Valid
HALT an RESET Input Transition Time
CLKO1 High to BG Asserted
CLKO1 High to BG Negated
BR Asserted to BG Asserted (RMC Not Asserted)
BGACK Asserted to BG Negated
BG Width Negated
BG Width Asserted
R/W Width Asserted (Write or Read)
GND = 0 V
(See
Figure 7-3
DC
, T
C
to
= -55 to +125°C. The electrical specifications in this document are preliminary
Figure
7-19) (Continued)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BRAGA
t
DVASN
t
SNDOI
CNDOI
t
t
BELCL
t
t
t
t
CHDO
t
GAGN
t
CHRL
RAAA
RACA
RASA
CHPV
SNDN
CLDH
t
PVCL
DVSA
DADV
CLBA
CLBN
SNDI
SHDI
DADI
DADI
DICL
DICL
CLDI
t
t
RWA
HRrf
GH
GA
Min
100
10
30
47
10
10
35
10
20
10
10
3
–
–
3
1
0
0
–
–
–
–
–
–
–
–
1
1
2
1
25 MHz
Max
140
2.5
20
23
25
50
40
60
32
10
35
20
20
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
22.5
Min
7.5
7.5
7.5
7.5
7.5
7.5
36
25
15
75
3
–
–
3
1
0
0
–
–
–
–
–
–
–
1
1
2
1
33.34 MHz
Max
37.5
7.5
2.5
15
18
20
30
45
24
26
15
15
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
2113B–HIREL–06/05
CLKO1
CLKO1
CLKO1
CLKO1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns