TS8388BMFSB/QNB3 Atmel Corporation, TS8388BMFSB/QNB3 Datasheet - Page 5

no-image

TS8388BMFSB/QNB3

Manufacturer Part Number
TS8388BMFSB/QNB3
Description
ADC 8-bit 1 GSPS
Manufacturer
Atmel Corporation
Datasheet
Table 3. Electrical Specifications (Continued)
2144A–BDC–04/02
Parameter
Analog Inputs
Full Scale Input Voltage range (differential mode)
(0V common mode voltage)
Full Scale Input Voltage range (single-ended input
option) (See Application Notes)
Analog input capacitance
Input bias current
Input Resistance
Full Power input Bandwidth
Small signal input Bandwidth (10% full scale)
Clock Inputs
Logic compatibility for clock inputs
(See Application Notes)
ECL Clock inputs voltages (V
Clock input power level into 50
Clock input power level
Clock input capacitance
Digital Outputs
Single-ended or differential input mode, 50% clock duty cycle (CLK, CLKB), Binary output data format,
Tj (typical) = 70 C.
Logic compatibility for digital outputs
(Depending on the value of V
(See Application Notes)
Differential output voltage swings
(assuming V
Output levels (assuming V
75 open transmission lines:
Logic “0” voltage
Logic “1” voltage
Logic “0” current
Logic “1” current
75 open transmission lines (ECL levels)
75 differentially terminated
50 differentially terminated
Logic “0” voltage
Logic “1” voltage
PLUSD
= 0V):
PLUSD
CLK
PLUSD
= 0V)
or V
termination
)
CLKB
):
Symbol
SSBW
FPBW
C
V
V
V
V
V
V
C
R
V
V
I
I
I
CLK
INB
INB
IN
IH
OH
IL
OL
IN
IN
IN
IN
IH
IL
Level
Test
4
4
4
4
4
4
4
4
4
4
4
4
-0.88
-125
-125
-250
0.70
0.54
ECL or specified clock input
Min
-1.1
1.3
1.5
1.5
0.5
-2
power level in dBm
dBm into 50
ECL or LVDS
Value
1.620
0.825
0.660
-1.62
Typ
-0.8
1.5
1.7
10
3
1
5
5
4
3
0
-1.54
Max
125
125
250
-1.5
3.5
3.5
20
50
50
10
TS8388BF
GHz
GHz
dBm
Unit
M
mV
mV
mV
mV
pF
µA
µA
µA
pF
V
V
V
V
V
V
V
Note
(1)(6)
(10)
(6)
5

Related parts for TS8388BMFSB/QNB3