LTC1174-3.3 Linear Technology, LTC1174-3.3 Datasheet - Page 6

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LTC1174-3.3

Manufacturer Part Number
LTC1174-3.3
Description
High Efficiency Step-Down and Inverting DC/DC Converter
Manufacturer
Linear Technology
Datasheet
OPERATIO
LTC1174
LTC1174-3.3/LTC1174-5
FU CTIO AL DIAGRA
The LTC1174 uses a constant off-time architecture to
switch its internal P-channel power MOSFET. The off-time
is set by an internal timing capacitor and the operating
frequency is a function of V
The output voltage is set by an internal resistive divider
(LTC1174-3.3 and LTC1174-5) or an external divider re-
turned to V
compares the divided output voltage to a reference voltage
of 1.25V.
To optimize efficiency, the LTC1174 automatically switches
between continuous and Burst Mode
age comparator is the primary control element when the
device is in Burst Mode operation, while the current com-
parator controls the output voltage in continuous mode.
During the switch“ON” time, switch current flows through
the 0.1
threshold of the current comparator A2, its output signal will
change state, setting the flip-flop and turning the switch off.
6
U
g
m
LB
V
FB
GND 4
OUT
sense resistor. When this current reaches the
FB
2
pin 1 (LTC1174). A voltage comparator A1
U
U
C
(Refer to Functional Diagram)
T
V
IN
TH2
A3
.
+
V
TH1
+
+
TM
W
A4
A5
operation. The volt-
LB
3
IN
(Pin 1 connection shown for LTC1174-3.3 and LTC1174-5, changes create LTC1174)
REFERENCE
* R1 = 51k FOR LTC1174-3.3
R1 = 93.5k FOR LTC1174-5
1.25V
SLEEP
RESET
SET
V
SHUTDOWN
6
IN
The timing capacitor, C
voltage goes below V
which resets the flip-flop and causes the switch to turn on
again. Also, the timing capacitor is recharged. The inductor
current will again ramp up until the current comparator A2
trips. The cycle then repeats.
When the load is relatively light, the LTC1174 automatically
goes into Burst Mode operation. The current mode loop is
interrupted when the output voltage reaches the desired
regulated value. The hysteretic voltage comparator A1 trips
when V
the switch and causing the timing capacitor to discharge.
This capacitor discharges past V
below V
generated.
In sleep mode, the LTC1174 is in standby and the load
current is supplied by the output capacitor. All unused
Burst Mode
8
Q
OUT
TH2
TM
is a trademark of Linear Technology Corporation.
is above the desired output voltage, shutting off
. Comparator A5 then trips and a sleep signal is
A2
+
TH1
A1
V
T
LIM1
. Comparator A4 will then trip,
, begins to discharge until its
+
TH1
V
LIM2
V
V
I
PGM
OUT
FB
7
until its voltage drops
1
(V
31.5k
R1*
FB
)
SW
5
R
0.1
SENSE
1174 BD

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