LTC1197 Linear Technology, LTC1197 Datasheet - Page 18

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LTC1197

Manufacturer Part Number
LTC1197
Description
10-Bit/ 500ksps ADCs in MSOP with Auto Shutdown
Manufacturer
Linear Technology
Datasheet

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LTC1197/LTC1197L
LTC1199/LTC1199L
A
conversion result. However, it is critical that the “–” input
voltage settles completely during the first CLK cycle of the
conversion time and be free of noise. Minimizing R
and C2 will improve settling time (see Figure 6). If a large
“–” input source resistance must be used, the time allowed
for settling can be extended by using a slower CLK
frequency.
Input Op Amps
When driving the analog inputs with an op amp it is
important that the op amp settle within the allowed time
(see Figure 5). Again, the “+” and “–” input sampling times
can be extended as described above to accommodate
slower op amps. High speed op amps such as the LT1224,
LT1191, LT1226 or LT1215 can be made to settle well even
with the minimum settling window of 200ns which occurs
at the maximum clock rate of 7.2MHz.
Source Resistance
The analog inputs of the LTC1197/LTC1197L/LTC1199/
LTC1199L look like a 20pF capacitor (C
200
switched between the selected “+” and “–” inputs once
during each conversion cycle. Large external source resis-
tors and capacitors will slow the settling of the inputs. It is
important that the overall RC time constants be short
enough to allow the analog inputs to completely settle
within the allowed time.
RC Input Filtering
It is possible to filter the inputs with an RC network as
shown in Figure 7. For large values of C
capacitive input switching currents are averaged into a net
DC current. Therefore, a filter should be chosen with a
small resistor and large capacitor to prevent DC drops
18
PPLICATI
resistor (R
V
IN
R
FILTER
Figure 7. RC Input Filtering
O
ON
U
) as shown in Figure 6. C
S
I
DC
C
I FOR ATIO
F
U
+
LTC1199
W
1197/99 F07
IN
F
) in series with a
(e.g., 1 F), the
U
SOURCE
IN
gets
across the resistor. The magnitude of the DC current is
approximately I
portional to V
of 2 s, the input current equals 50 A at V
case a filter resistor of 10 will cause 0.1LSB of full-scale
error. If a larger filter resistor must be used, errors can be
eliminated by increasing the cycle time.
Input Leakage Current
Input leakage currents can also create errors if the source
resistance gets too large. For instance, the maximum
input leakage specification of 1 A (at 85 C) flowing through
a source resistance of 1k will cause a voltage drop of 1mV
or 0.2LSB. This error will be much reduced at lower
temperatures because leakage drops rapidly (see typical
curve of Input Channel Leakage Current vs Temperature).
REFERENCE INPUTS
The voltage on the reference input of the LTC1197/
LTC1197L defines the voltage span of the A/D converter.
The reference input transient capacitive switching cur-
rents are due to the switched-capacitor conversion tech-
nique used in these ADCs (see Figure 8). During each bit
test of the conversion (every CLK cycle), a capacitive
current spike will be generated on the reference pin by the
ADC. These current spikes settle quickly and do not cause
a problem.
Reduced Reference Operation
The minimum reference voltage of the LTC1199 is 4V and
the minimum reference voltage of the LTC1199L is 2.7V
because the V
together. However, the LTC1197/LTC1197L can operate
with reference voltages below 1V.
R
Figure 8. Reference Input Equivalent Circuit
V
OUT
REF
IN
CC
. When running at the minimum cycle time
DC
GND
REF
supply and reference are internally tied
5
4
= 20pF(V
IN
/t
EVERY CLK CYCLE
R
CYC
ON
) and is roughly pro-
5pF TO 25pF
LTC1197
IN
1197/99 F08
= 5V. In this

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