LTC1272-3CCS Linear Technology, LTC1272-3CCS Datasheet
LTC1272-3CCS
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LTC1272-3CCS Summary of contents
Page 1
... The LTC1272 operates with a single 5V supply but can also accept the 5V/–15V supplies required by the AD7572 (Pin 23, the negative supply pin of the AD7572, is not connected on the LTC1272). The LTC1272 has the same input range as the AD7572 but, to achieve single supply opera- tion, it provides a 2.42V reference output instead of the – ...
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... C, = 130 C/W JMAX JA With Internal Reference (Note 4) LTC1272-XA MIN TYP 12 ORDER PART NUMBER CONVERSION CONVERSION TIME = 3 s TIME = 8 s LTC1272-3ACN LTC1272-8ACN LTC1272-3CCN LTC1272-8CCN S PACKAGE ONLY LTC1272-3ACS LTC1272-8ACS LTC1272-3CCS LTC1272-8CCS LTC1272-XC MAX MIN TYP MAX 12 1 ...
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... OUT OUT OUT OUT (Note 250kHz (LTC1272-3), 111kHz (LTC1272-8) SAMPLE CONDITIONS 10kHz Input Signal 10kHz Input Signal 10kHz Input Signal CONDITIONS 4.75V V 5.25V DD LTC1272 LTC1272-XC TYP MAX MIN TYP MAX 2.420 2.440 2 ...
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... C. A/D transfer curve. A Note 6: The LTC1272 has the same input range as the AD7572 but, to achieve single supply operation, it provides a 2.42V reference output instead of the –5.25V of the AD7572. This requires that the polarity of the reference bypass capacitor be reversed when plugging an LTC1272 into an AD7572 socket ...
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... CS (Pin 21): The Chip Select Input must be low for the ADC to recognize RD and HBEN inputs. BUSY (Pin 22): The BUSY Output is low when a conver- sion is in progress. NC (Pin 23): Not Connected Internally. The LTC1272 does not require negative supply. This pin can accommodate the –15V required by the AD7572 without problems. V (Pin 24): Positive Supply, 5V ...
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... LT1272 • TPC06 *EFFECTIVE NUMBER OF BITS, ENOBs = 3584 4096 LTC1272 • TPC02 Maximum Clock Frequency vs Temperature –55 – 100 125 TEMPERATURE (°C) LTC1272 ENOBs* vs Frequency 250kHz ...
Page 7
... Figure 1, the A input connects to the sample-and-hold IN capacitor through a 300 /2.7k divider allows the LTC1272 to convert input signals while operating from a 4.5V supply. The conver- sion has two phases: the sample phase and the convert phase. During the sample phase, the comparator offset is ...
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... (kHz) IN S/( 76dB Figure 3. LTC1272 Effective Number of Bits (ENOBs) vs Input Frequency 250kHz – 0.5 –1.0 Figure 4. LTC1272 Dynamic DNL Total Harmonic Distortion Total Harmonic Distortion (THD) is the ratio of the RMS sum of all harmonics of the input signal to the fundamental itself ...
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... CLK IN may be near RD’s falling edge. Driving the Analog Input The analog input of the LTC1272 is much easier to drive than that of the AD7572. The input current is not modu- lated by the DAC as in the AD7572. It has only one small current spike from charging the sample-and-hold capaci- tor at the end of the conversion ...
Page 10
... Figure 8. LTC1272 Internal 2.42V Reference Unipolar Operation Figure 9 shows the ideal input/output characteristic for the input range of the LTC1272. The code transitions occur midway between successive integer LSB values (i.e., 1/2LSB, 3/2LSBs, 5/2LSBs . . . FS – 3/2LSBs). The output code is natural binary with 1 LSB = FS/4096 = (5/4096 ...
Page 11
... A single point analog ground separate from the logic system ground should be established with an analog ground plane at pin 3 (AGND close as possible to the LTC1272, as shown in Figure 11. Pin 12 (LTC1272 DGND) and all other analog grounds should be connected to this single analog ground point. No other digital grounds should be connected to this analog ground point ...
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... Figure 12. Internal Logic for Control Inputs CS, RD and HBEN CS & RD BUSY CLK IN UNCERTAIN CONVERSION TIME FOR 30ns t * THE LTC1272 IS ALSO COMPATIBLE WITH THE AD7572 SYNCHRONIZATION MODES. SEE “DIGITAL INTERFACE” TEXT. Table 1. Data Bus Output, CS and RD = Low PIN 4 PIN 5 PIN 6 Data Outputs* ...
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... D11 . . . D0/8 (see Figure 16 and Table 4). This data may be disregarded if not required. A second Read operation reads the new data (DB11 . . . DB0) and starts another conversion. A delay at least as long as the LTC1272 conversion time plus the 1 s minimum delay between conversions must be allowed between Read operations. LTC1272 ...
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... NEW DATA DB11-DB8 t 12 LTC1272 • TA17 D3/11 D2/10 D1/9 DB3 DB2 DB1 DB11 DB10 DB9 CONV t 7 NEW DATA DB11-DB0 t 12 LTC1272 • TA18 D5 D4 D3/11 D2/10 D1/9 DB5 DB4 DB3 DB2 DB1 DB5 DB4 DB3 DB2 DB1 D0/8 DB0 DB8 D0/8 DB0 DB0 ...
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... MC68000 Microprocessor Figure 18 shows a typical interface for the MC68000. The LTC1272 is operating in the Slow Memory Mode. Assum- ing the LTC1272 is located at address C000, then the following single 16-bit Move instruction both starts a conversion and reads the conversion result: Move.W $C000,D0 ...
Page 16
... A0 is used to assert HBEN, so that an even address (HBEN = LOW) to the LTC1272 will start a conversion and read the low data byte. An odd address (HBEN = HIGH) will read the high data byte. This ...
Page 17
... F bypass capacitor on the V and can be removed, or, because there is no internal connection to pin 23, it can remain unmodified. The clock can be considered synchronous with CS and RD in cases where the LTC1272 CLK IN signal is derived from the same clock as the microprocessor reading the LTC1272. LTC1272 A V ...
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... D9 HBEN D8 CLK OUT D7 CLK IN** D6 D0/8 * THE LTC1272 HAS THE SAME INPUT RANGE BUT PROVIDES A 2.42V D5 D1/9 REFERENCE OUTPUT AS OPPOSED TO THE –5.25V OF THE AD7572. FOR PROPER OPERATION, REVERSE THE REFERENCE CAPACITOR POLARITY AND SHORT OUT THE D4 D2/10 10 RESISTOR. ** THE ADC CLOCK SHOULD BE SYNCHRONIZED TO THE CONVERSION START ...
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... P DATA BUS * THE LTC1272 HAS THE SAME INPUT RANGE BUT PROVIDES A 2.42V REFERENCE OUTPUT AS OPPOSED TO THE –5.25V OF THE AD7572. FOR PROPER OPERATION, REVERSE THE REFERENCE CAPACITOR POLARITY AND SHORT OUT THE 10 RESISTOR. THE D FLIP-FLOP SYNCHRONIZES THE CONVERSION START SIGNAL ( THE ...
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... LTC1272 PACKAGE DESCRIPTIO 0.260 ± 0.010* (6.604 ± 0.254) 0.300 – 0.325 0.130 ± 0.005 (7.620 – 8.255) (3.302 ± 0.127) 0.015 (0.381) MIN 0.009 – 0.015 (0.229 – 0.381) 0.125 +0.025 (3.175) 0.325 –0.015 MIN +0.635 8.255 –0.381 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS ...