LTC1439 Linear Technology, LTC1439 Datasheet - Page 10

• Manufacturer Part Number: LTC1439
• Description: Dual High Efficiency/ Low Noise/ Synchronous Step-Down Switching Regulators
• Manufacturer: Linear Technology

OPERATION
Main Control Loop
The LTC1438/LTC1439 use a constant frequency, current
mode step-down architecture. During normal operation,
the top MOSFET is turned on each cycle when the oscillator
sets the RS latch and turned off when the main current
comparator I1 resets the RS latch. The peak inductor
current at which I1 resets the RS latch is controlled by the
voltage on the I
error amplifier (EA). The V
Functions, allows the EA to receive a selectively attenuated
output feedback voltage V
V
back voltage V
dividers on the second controller. When the load current
increases, it causes a slight decrease in V
1.19V reference, which in turn causes the I
voltage to increase until the average inductor current
matches the new load current. After the large top MOSFET
has turned off, the bottom MOSFET is turned on until either
the inductor current starts to reverse, as indicated by
current comparator I2, or the beginning of the next cycle.
The top MOSFET drivers are biased from floating boot
strap capacitor C
each Off cycle. When V
V
turn on the top MOSFET continuously. The dropout detec-
tor counts the number of oscillator cycles that the top
MOSFET remains on and periodically forces a brief off
period to allow C
The main control loop is shut down by pulling the RUN/
SS1 (RUN/SS2) pin low. Releasing RUN/SS1 (RUN/SS2)
allows an internal 3 A current source to charge soft start
capacitor C
loop is enabled with the I
approximately 30% of its maximum value. As C
ues to charge, I
normal operation to resume. When both RUN/SS1 and
RUN/SS2 are low, all LTC1438/LTC1439 functions are
shut down. Refer to the LTC1538-AUX/LTC1539 data
sheet for 5V keep-alive applications.
Comparator OV guards against transient overshoots > 7.5%
by turning off the top MOSFET and keeping it off until the
fault is removed.
LTC1438/LTC1439
10
PROG2
OUT
, however, the loop may enter dropout and attempt to
and V
SS
OSENSE2
. When C
FB2
TH1
TH1
B
U
B
from either internal or external resistive
, which normally is recharged during
to recharge.
(I
(I
TH2
TH2
allow EA to receive an output feed-
(Refer to Functional Diagram)
SS
IN
) pin, which is the output of each
) is gradually released allowing
FB1
decreases to a voltage close to
reaches 1.3V, the main control
PROG1
TH1
from the SENSE
(I
TH2
pin, described in the Pin
) voltage clamped at
FB
relative to the
–
1 pin while
TH1
SS
contin-
(I
TH2
)
Low Current Operation
Adaptive Power mode allows the LTC1439 to automati-
cally change between two output stages sized for different
load currents. The TGL1 (TGL2) and BG1 (BG2) pins drive
large synchronous N-channel MOSFETs for operation at
high currents, while the TGS1 (TGS2) pin drives a much
smaller N-channel MOSFET used in conjunction with a
Schottky diode for operation at low currents. This allows
the loop to continue to operate at normal operating fre-
quency as the load current decreases without incurring the
large MOSFET gate charge losses. If the TGS1 (TGS2) pin
is left open, the loop defaults to Burst Mode operation in
which the large MOSFETs operate intermittently based on
load demand.
Adaptive Power mode provides constant frequency opera-
tion down to approximately 1% of rated load current. This
results in an order of magnitude reduction of load current
before Burst Mode operation commences. Without the
small MOSFET (i.e., no Adaptive Power mode) the transi-
tion to Burst Mode operation is approximately 10% of
rated load current.
The transition to low current operation begins when com-
parator I2 detects current reversal and turns off the
bottom MOSFET. If the voltage across R
exceed the hysteresis of I2 (approximately 20mV) for one
full cycle, then on following cycles the top drive is routed
to the small MOSFET at the TGS1 (TGS2) pin and the BG1
(BG2) pin is disabled. This continues until an inductor
current peak exceeds 20mV/R
voltage exceeds 0.6V, either of which causes drive to be
returned to the TGL1 (TGL2) pin on the next cycle.
Two conditions can force continuous synchronous opera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE
(SENSE
SFB1 pin is below 1.19V. The latter condition is used to
assist in secondary winding regulation, as described in the
Applications Information section.
–
2) pins are below 1.4V, and the other is when the
+
1 (SENSE
SENSE
+
2) and SENSE
or the I
SENSE
TH1
does not
(I
TH2
–
1
)