LTC1439 Linear Technology, LTC1439 Datasheet - Page 18

• Manufacturer Part Number: LTC1439
• Description: Dual High Efficiency/ Low Noise/ Synchronous Step-Down Switching Regulators
• Manufacturer: Linear Technology

APPLICATIONS
LTC1438/LTC1439
Functional Diagram. In a hard short (V
will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applica-
tions with regulated output voltages of 1.8V or greater.
Phase-Locked Loop and Frequency Synchronization
The LTC1439 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is 30% around the center
frequency f
The value of C
frequency (f
(V
Stating the frequency as a function of V
18
PLLLPF
C
Frequency kHz
C
OSC
OSC
( )
= 1.19V):
1.3f
0.7f
pF
pF
Figure 7. Operating Frequency vs V
O
f
O
O
O
O
.
). Assuming the phase-locked loop is locked
0
OSC
11
Frequency (kHz)
is calculated from the desired operating
0.5
U
2.1(10 )
17
INFORMATION
1.0
V
8 4 10
U
PLLLPF
A
. (
4
18
(V)
1.5
8
)
1
A
W
2.0
OUT
V
11
PLLLPF
2 4
PLLLPF
.
1438 F07
= 0V) the current
PLLLPF
V
2.5
U
and C
2000
OSC
:
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, f
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. A simplified block
diagram is shown in Figure 8.
If the external frequency f
tor frequency f
ing up the PLL LPF pin. When the external frequency is less
than f
PLL LPF pin. If the external and internal frequencies are the
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
difference. Thus the voltage on the PLL LPF pin is adjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
PLLIN*
SGND
FREQUENCY
50k
EXTERNAL
f
H
0SC
= f
Figure 8. Phase-Locked Loop Block Diagram
, current is sunk continuously, pulling down the
*LTC1439 ONLY
H
, is equal to the capture range, f
C
DETECTOR
FREQUENCY
PHASE
DETECTOR
= 0.3 f
DIGITAL
PHASE/
0SC
, current is sourced continuously, pull-
O
.
2.4V
PLLIN
is greater than the oscilla-
R
PLL LPF*
LP
OSC
C
LP
1438 F08
C:
C
OSC
C
OSC