LTC2928 Linear Technology, LTC2928 Datasheet - Page 25

• Manufacturer Part Number: LTC2928
• Description: Multichannel Power Supply Sequencer and Supervisor
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
The positive supply monitor undervoltage threshold at all
of the monitor inputs is 0.5V. Connect a resistive divider
from the sensed voltage to ground. Connect the tap point
to the respective high impedance monitor input. Specify
the required undervoltage threshold (UV
the divider ratio using
This application requires –6.5% undervoltage thresholds
for all supplies. For the 1.8V supply monitored on V3,
the undervoltage threshold is 1.683V (1.8V x 0.935). The
necessary divider ratio is
A good choice for R3B is 23.7k and R3A is 10k. All sequence
thresholds are a percentage of the configured undervoltage
threshold. The remaining ratios are:
The “power-good” time defines the maximum time allowed
for all monitored voltages to reach their undervoltage
threshold when sequencing-up, or the sequence-down
threshold (when sequencing-down) with respect to the time
of the first enabled (disabled) supply. If the “power-good”
timer expires, a sequence fault occurs. The “power-good”
time (t
ground. Calculate the “power-good” capacitance from
For this application, the “power-good” time is 400ms,
yielding
g. Undervoltage thresholds
h. Power-good timing
C
RnB
RnA
R A
R A
R A
R A
R B
R B
R B
R B
PTMR
3
1
2
1
4
3
2
4
PTMR
=
=
=
=
=
( )
2 338
UV
1 683
1 403
F
3 086
0 5
0 5
0 5
0 5
.
) is set with a capacitor from the PTMR pin to
.
.
.
.
0 5
.
.
.
=
TH
.
V
V
V
V
t
( )
V
PTMR
4 0 Ω
V
–
–
–
–
.
1 3 68
1 2 37
1 1
1 5 17
U
M
–
≈
≈
≈
≈
1
( )
s
.
. .
.
.
81
U
W
TH
) and calculate
U
The reset delay time is the additional time that  R  S  T is held
low after all monitor inputs are above their undervoltage
threshold. It is also the additional time that  O  V is held low
(after an overvoltage event) after all monitor inputs are
below their overvoltage threshold. When the reset timer
expires,  R  S  T and/or  O  V is allowed to pull high. The reset
delay time (t
pin to ground. Calculate the reset capacitance from
For this application, the reset delay time is 190ms,
yielding
Configure the OVA pin to set the global overvoltage
thresholds. The application requires overvoltage thresholds
at approximately 25% above the nominal supply voltage.
For the 1.8V supply, the overvoltage threshold (OV
equals 2.25V (1.8V x 1.25). Compute the required value
for V
For this application,
From the curves in Figures 16 and 17, the approximate
value for V
Since the other monitor inputs were configured for the
same relative undervoltage level, the relative overvoltage
levels for the other supplies are the same (+ 25%).
The application requires a fast shutdown upon overvoltage.
To generate a fault upon an overvoltage condition, tie
 O  V to  F  L  T . The fault condition shuts down all controlled
supplies.
i. Reset delay time
j. Overvoltage thresholds
C
C
C
V
V
PTMR
RTMR
RTMR
OVA
OVA
OVA
( )
( )
from:
V
V
( )
( )
=
F
F
OVA
=
=
4 0
RTMR
400
=
=
.
RnA RnB
10
4 0
is achieved by leaving the OVA pin open.
t
190
M
RTMR
4 0 Ω
ms
.
k
RnA
.
) is set with a capacitor from the RTMR
Ω
10
+
M
+
ms
M
23 7
=
Ω
k
( )
0 1
s
.
=
.
k
0 047
µ
•
.
F
OV
• .
2 25 0 667
TH
µ
( )
F
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V
.
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TH
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