LTC3738 Linear Technology, LTC3738 Datasheet - Page 13

• Manufacturer Part Number: LTC3738
• Description: 3-Phase Buck Controller
• Manufacturer: Linear Technology

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OPERATIO
Start-Up
The start-up of the LTC3738 is controlled by the voltage
ramp on the SS pin. The start-up is not completed until the
short-circuit arming latch is enabled. During start-up, the
foldback current limit is temporarily defeated and at the
same time no reverse inductor current is allowed. This is
helpful for situations where output voltage has been “pre-
biased” at some voltage before the controller is enabled.
This will prevent sinking current during start-up which
would otherwise pull current from the pre-biased output.
VID Table and NO_CPU Detection
The LTC3738 has a VID block which is compatible with
VRM9 and VRM10. Tying VID5 to V
table. When the voltage at VID5 is less than V
VRM10 table is selected and this pin serves as the VID5 bit
of VRM10. There is a built in –25mV output offset for the
VRM10 VID table and a –12.5mV output offset for the
VRM9 VID table.
The LTC3738 detects the presence of CPU by monitoring
the VID bits. If a VID0-VID4 all “1” condition is detected,
the controller acknowledges a NO_CPU fault. If this fault
condition persists for more than 1µs, the SS pin is pulled
low and the controller is shut down. The LTC3738 will
attempt a normal start-up when the NO_CPU fault is
removed.
U
(Refer to Functional Diagram)
CC
will select the VRM9
CC
– 1.5V, the
Thermal Detection
An accurate comparator and a thermal detector are inte-
grated into the LTC3738 for external or internal thermal
detection. Tying TSNS to V
thermal detector which generates a thermal event at or
above 120°C with 10°C hysteresis. When the voltage at
TSNS is less than V
is disabled and this pin serves as the input to an accurate
comparator which is referenced to V
of V
at TSNS is less than V
output pin, will be pulled low when a thermal event occurs.
Active Voltage Positioning
Load slope is programmable in the LTC3738 through
external resistors. The inductor current information for all
three channels is sensed and combined; the final result is
presented as a voltage drop between AVP and IN
voltage drop is scaled through two external resistors
attached to IN
compensation for load slope. The final load slope is
defined by the inductor current sense resistors and the
two external resistors mentioned above.
CC
/24. A thermal event is generated when the voltage
+
and then added to the output voltage as the
CC
– 1.6V, the internal thermal detector
CC
/3. VR_HOTB, an open-collector
CC
will enable an internal
CC
/3 with a hysteresis
LTC3738
13
+
. This
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