74LVX273TTR STMicroelectronics, 74LVX273TTR Datasheet

IC FLIP FLOP OCTAL D 20-TSSOP

74LVX273TTR

Manufacturer Part Number
74LVX273TTR
Description
IC FLIP FLOP OCTAL D 20-TSSOP
Manufacturer
STMicroelectronics
Series
74LVXr
Type
D-Type Busr
Datasheet

Specifications of 74LVX273TTR

Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
90MHz
Delay Time - Propagation
9.6ns
Trigger Type
Positive Edge
Current - Output High, Low
4mA, 4mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Number Of Circuits
8
Logic Family
74LV
Logic Type
D-Type Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
20.4 ns
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-7116-2
74LVX273TTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVX273TTR
Manufacturer:
ST
Quantity:
20 000
DESCRIPTION
The 74LVX273 is a low voltage CMOS OCTAL
D-TYPE FLIP-FLOP WITH CLEAR fabricated with
sub-micron silicon gate and double-layer metal
wiring C
power, battery operated and low noise 3.3V
applications.
Information signals applied to D inputs are
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
HIGH SPEED:
f
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
LOW POWER DISSIPATION:
I
LOW NOISE:
V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
MAX
CC
PLH
OH
IL
OLP
CC
= 0.8V, V
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 150 MHz (TYP.) at V
= 0.3V (TYP.) at V
2
t
MOS technology. It is ideal for low
PHL
OL
= 4 mA (MIN) at V
IH
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
= 2V at V
A
=25°C
CC
CC
=3.3V
CC
=3V
CC
= 3.3V
=3V
WITH CLEAR (5V TOLERANT INPUTS)
Table 1: Order Codes
transferred to the Q outputs on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independently of the other inputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74LVX273
Rev. 3
74LVX273MTR
74LVX273TTR
TSSOP
T & R
1/12

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74LVX273TTR Summary of contents

Page 1

... CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LVX273 SOP TSSOP PACKAGE T & R SOP 74LVX273MTR TSSOP 74LVX273TTR Rev. 3 1/12 ...

Page 2

Figure 2: Input Equivalent Circuit Table 3: Truth Table INPUTS CLEAR Don’t Care Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays 2/12 Table 2: Pin Description ...

Page 3

Table 4: Absolute Maximum Ratings Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 4

Table 7: Dynamic Switching Characteristics Symbol Parameter V Dynamic Low Voltage OLP Quiet Output (note OLV Dynamic High Voltage V IHD Input (note 1, 3) Dynamic Low Voltage V ILD Input (note Worst ...

Page 5

Table 4: CAPACITIVE CHARACTERISTICS Symbol Parameter C Input Capacitance IN C Power Dissipation PD Capacitance (note defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without PD ...

Page 6

Figure 7: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle) Figure 8: Waveform - Recovery Time (f=1MHz; 50% duty cycle) 6/12 ...

Page 7

SO-20 MECHANICAL DATA DIM. MIN. A 2.35 A1 0.1 B 0.33 C 0.23 D 12. 10.00 h 0.25 L 0.4 k 0° ddd mm. TYP MAX. 2.65 0.093 0.30 0.004 0.51 0.013 0.32 0.009 13.00 0.496 ...

Page 8

DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 6.4 E 6 0˚ PIN 1 IDENTIFICATION 1 8/12 TSSOP20 MECHANICAL DATA mm. TYP MAX. 1.2 0.15 ...

Page 9

Tape & Reel SO-20 MECHANICAL DATA DIM. MIN 12 10.8 Bo 13.2 Ko 3.1 Po 3.9 P 11.9 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 30.4 11 0.425 13.4 0.520 3.3 ...

Page 10

Tape & Reel TSSOP20 MECHANICAL DATA DIM. MIN 12 6.8 Bo 6.9 Ko 1.7 Po 3.9 P 11.9 10/12 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 22.4 7 0.268 7.1 ...

Page 11

Table 9: Revision History Date Revision 27-Aug-2004 3 Description of Changes Ordering Codes Revision - pag. 1. 74LVX273 11/12 ...

Page 12

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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