SC1401 Semtech Corporation, SC1401 Datasheet - Page 13

• Manufacturer Part Number: SC1401
• Description: HIGH PERFORMANCE SYNCHRONOUS BUCK CONTROLLER WITH LDO FOR PORTABLE POWER
• Manufacturer: Semtech Corporation

November 21, 2000
Gate Drive and Control
The gate drivers on the SC1401 are designed to
switch large MOSFETs at up to 350kHz. The high-
side gate drivers are required to drive the gates of the
high-side MOSFETs above the V5V input. The supply
for these gate drivers is generated by charging a
bootstrap capacitor from a supply when the low side
driver is on. Monitoring circuits ensure that the
bootstrap capacitor is charged when coming out of
shutdown or fault conditions where the bootstrap
capacitor may be depleted.
In continuous conduction mode, the low side driver
outputs that control the synchronous rectifier in the
power stage is on when the high side driver is off.
Under light load conditions the ripple current will
approach the point where it reverses polarity. This is
detected by the low side driver control and the
synchronous rectifier is turned off before the current
reverses, preventing energy drain from the output.
Current Sense (CSH,CSL)
The output current of the power supply is sensed as
the voltage drop across an external resistor between
the CSH and CSL pins. Over current is detected when
V(CSH,CSL) exceeds +/-130mV. An over current will
turn off the high side driver on a cycle by cycle basis.
CSH and CSL are also used for peak current feed
back in the main PWM loop and to determine the
current level for entering power save mode and the
turn-off time for the synchronous rectifier.
Oscillator
The SC1401 oscillator frequency is trimmed to +/-
10%. When the SYNC pin is high the oscillator runs at
300kHz; when sync is low the frequency is 200kHz.
The oscillator can also be synchronized to the falling
edge of a clock on the SYNC pin with a frequency
between 240kHz and 350kHz. The 200kHz operation
state is used for highest efficiency, and 300kHz for
minimum output ripple and/or smaller inductor and
output capacitor values.
Fault Protection
In addition to cycle-by-cycle current limit, the SC1401
monitors over temperature, power supply output over
and under-voltage and input supply under-voltage
conditions. The over temperature detect will shut the
part down if the die temperature exceeds 150°C with
10°C of hysteresis.
If the SMPS output is greater than 10% of its nominal
© 2000 SEMTECH CORP.
HIGH PERFORMANCE SYNCHRONOUS BUCK
CONTROLLER WITH LDO FOR PORTABLE
POWER
value, the SMPS is latched off and synchronous
NMOS FET is turned on. To prevent the output from
ringing below ground a signal level Schottky diode
should be placed across the output with its anode at
ground. The same results apply if VDD1 or V5V fall
below their respective under-voltage thresholds.
If the SMPS or LDO outputs fall 10% below its
nominal, the RESET output is pulled low.
Shutdown Mode
Holding the SHDN pin low disables the SC1401,
reducing the total supply input current to <10uA. A
shutdown condition tri-states the SMPS and pulls the
RESET output low. Holding the ENABLEIO pin low
disables the LDO.
Output Voltage Selection
If FB is connected to CSL, the SMPS will regulate to
the internal bandgap voltage, 1.25V. If external
resistors are used, the output is regulated based on a
resistor divider and 1.25V at the FB pin.
LDO Regulation Operation
The n-channel LDO regulator is capable of supplying
1A over a 1.25V to 5.5V output range. The input
voltage to the LDO is the VDD2 supply with a
maximum input voltage of 30V. To set the output
voltage, an external resistor divider is used based on
1.25V at the IOS pin.
Power-up and Soft-Start
The SMPS contains its own counter and DAC to
gradually increase the current limit at startup to
prevent input surge currents. The current limit is
increased from 0, 25%, 50%, 75%, to 100% linearly
over the course of 512 switching cycles.
A RESET output is also generated at startup. The
RESET pin is held low for 32K switching cycles.
Another timer is used to enable the undervoltage
protection. The undervoltage protection circuitry is
enabled after 5000 switching cycles at which time the
SMPS should be in regulation.
Evaluation Board
The evaluation board schematic shown on page 10 is
configured to output 2.0V at 7.0A on the main switcher
and 1.5V at 1A on the linear regulator. In addition, the
main switcher has a compensation circuit consisting of
C18, R16 and C17. This circuit aids in the stability of
the supply for variability in output filter components
652 MITCHELL ROAD
NEWBURY PARK CA 91320
SC1401
13