ds2482-800 Maxim Integrated Products, Inc., ds2482-800 Datasheet
ds2482-800
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ds2482-800 Summary of contents
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... GENERAL DESCRIPTION The DS2482-800 is an I²C to 1-Wire that interfaces directly to standard (100kHz max) or fast (400kHz max) I²C masters to perform bi- directional protocol conversion between the I²C master and any downstream 1-Wire slave devices. Relative to any attached 1-Wire slave device, the DS2482-800 is a 1-Wire master ...
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ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground Maximum Current Into Any Pin Operating Temperature Range Junction Temperature Storage Temperature Range Soldering Temperature Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the ...
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PARAMETER Write 0 Low Time Write 0 Recovery Time Reset Low Time Presence-Detect Sample Time Sampling for Short and Interrupt Reset High Time I²C-Pins (Note 7) See Figure 9 LOW Level Input Voltage HIGH Level Input Voltage Hysteresis of Schmitt ...
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... Applies to SDA, SCL, and AD0, AD1, AD2. Note 9: I/O pins of the DS2482 do not obstruct the SDA and SCL lines if V Note 10: The DS2482 provides a hold time of at least 300ns for the SDA signal (referred to the V signal) to bridge the undefined region of the falling edge of SCL. Note 11: The maximum t ...
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... AD2 DETAILED DESCRIPTION The DS2482-800 is a self-timed 8-channel 1-Wire master, which supports advanced 1-Wire waveform features including standard and Overdrive speeds, active pullup, and strong pullup for power delivery. Once supplied with command and data, the I/O controller of the DS2482 performs time-critical 1-Wire communication functions such as reset/presence detect cycle, read-byte, write-byte, single-bit R/W and triplet for ROM Search, without requiring interaction with the host processor ...
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... Channel Selection Register The content of the Channel Selection Register specifies which of the channels is selected and will be the target of subsequent 1-Wire communication commands. The DS2482-800 supports eight 1-Wire communication channels IO0 to IO7. Only one of these channels can be active/selected at any time. Once selected, a 1-Wire channel remains selected until a different channel is selected through the Channel Select command or by initiating a device reset ...
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... If SPU is 1, the DS2482 applies active pullup to the rising edge of the time slot in which the strong pullup starts, regardless of the APU bit setting. However, in contrast to setting APU = 1 for active pullup, the low-impedance pullup will not end after t is expired ...
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... Reset command. Short Detected (SD) The SD bit is updated with every 1-Wire Reset command. If the DS2482 detects a logic 0 on the 1-Wire line at t during the Presence Detect cycle, the SD bit will be set to 1. This bit will return to its default 0 with a subsequent 1- Wire Reset command provided that the short has been removed ...
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... Wire Triplet command and the Dallas Application Note 187, "1-Wire Search Algorithm". FUNCTION COMMANDS The DS2482 understands 9 function commands, which fall into four categories: device control, I²C communication, 1-Wire setup and 1-Wire communication. The feedback path to the host is controlled by a read pointer, which is set automatically by each function command for the host to efficiently access relevant information. The host processor sends these commands and applicable parameters as strings of one or two bytes using the I² ...
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... When read, the upper nibble is always 0h. Defining the features for subsequent 1-Wire communication. 1-Wire activity must have ended before the DS2482 can process this command. Command code and parameter will not be acknowledged if 1WB = 1 at the time the command code is received and the command will be ignored. None ...
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... See the table below for the respective values. Selecting a 1-Wire IO channel other that IO0; randomly selecting one of the available 1-Wire IO channels. 1-Wire activity must have ended before the DS2482 can process this command. Command code and parameter will not be acknowledged if 1WB = 1 at the time the command code is received and the command will be ignored ...
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... To perform single bit writes or reads on a 1-Wire IO channel when single bit communication is necessary (the exception). 1-Wire activity must have ended before the DS2482 can process this command. Command code and bit byte will not be acknowledged if 1WB = 1 at the time the command code is received and the command will be ignored ...
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... NOTE on Figure 7: Depending on its internal state, a 1-Wire slave device will transmit data to its master (e.g., the DS2482). When responding with 1-Wire slave will start pulling the line low during t generator determines when this pulldown ends and the voltage starts rising again. When responding with ...
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... The direction byte determines the type of write-time slot if both read-time slots are 0 (a typical case). In this case the DS2482 will generate a write-1 time slot and a write-0 time slot the read-time slots are 0 and 1, there will follow a write 0 time slot. ...
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... Condition Slave Address The slave address to which the DS2482 responds is shown in Figure 8. The logic states at the address pins AD0, AD1 and AD2 determine the value of the address bits A0, A1, and A2. The address pins allow the device to respond to one of eight possible slave addresses. The slave address is part of the slave-address/control byte. The last bit of the slave-address/control byte (R/W) defines the data direction. When set subsequent data will flow from master to slave (write access) ...
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... Figure 8. DS2482 Slave Address Most Signi- ficant Bit I²C Definitions The following terminology is commonly used to describe I²C data transfers. The timing references are defined in Figure 9. Bus Idle or Not Busy: Both, SDA and SCL, are inactive and in their logic HIGH states. START Condition: To initiate communication with a slave, the master has to generate a START condition. A START condition is defined as a change in state of SDA from HIGH to LOW while SCL remains HIGH ...
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... NOTE: Timing is referenced to V Writing to the DS2482 To write to the DS2482, the master must access the device in write mode, i.e., the slave address must be sent with the direction bit set to 0. The next byte to be sent is a command code, which, depending on the command, may be followed by a command parameter ...
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... E5h is an invalid channel selection code. Case C: 1-Wire busy (1WB = 1) S AD,0 A CHSL The master should stop and restart as soon as the DS2482 does not acknowledge the command code. Set Read Pointer, e.g., to read from another register Case A: valid read pointer code S AD,0 A SRP C3h is the valid read pointer code for the configuration register ...
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... In the first cycle, the master sends the command; then the master waits (Idle) for the 1-Wire Reset to complete. In the second cycle the DS2482 is accessed to read the result of the 1-Wire Reset from the Status Register. Case B: 1-Wire idle (1WB = 0), busy polling until the 1-Wire Command is completed, then read the result ...
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... When 1WB has changed from the Status Register holds the valid result of the 1-Wire Single Bit command. Case C: 1-Wire busy (1WB = 1) S AD,0 A 1WSB The master should stop and restart as soon as the DS2482 does not acknowledge the command code. 1-Wire Triplet, e.g., to perform a Search ROM function on a 1-Wire IO channel Case A: 1-Wire idle (1WB = 0), no busy polling S AD,0 A 1WT The idle time is needed for the 1-Wire function to complete ...
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... Application Information SDA and SCL Pullup Resistors SDA is an open-drain output on the DS2482 that requires a pullup resistor to realize high logic levels. Because the DS2482 uses SCL only as input (no clock stretching) the master can drive SCL either through an open- drain/collector output with a pullup resistor or a push-pull output. ...
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Only for pullup voltages of 3V and lower can the maximum permissible bus capacitance of 400pF be maintained. A reduced bus capacitance of 300pF is acceptable for pullup voltages of 4V and lower. For fast speed operation at any pullup ...
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REVISION HISTORY REVISION DATE Removed the 1-Wire line termination resistor and references to it from the 8/08 Typical Operating Circuit and Figure 11. Conversion to lead (Pb) free product. 11/09 Removed the presence pulse masking feature. Revised the recommendation on ...