upd3728 Renesas Electronics Corporation., upd3728 Datasheet
upd3728
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upd3728 Summary of contents
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PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR DESCRIPTION µ The PD3728DZ is a high-speed and high sensitive color CCD (Charge Coupled Device) linear image sensor which changes optical images to electrical signal and has the function of color ...
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BLOCK DIAGRAM φ φ CLB GND V 2 OUT 32 (Blue, even) GND OUT 34 (Blue, odd) GND OUT 36 (Green, odd OUT 1 (Green, even) GND 2 ...
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PIN CONFIGURATION (Top View) CCD linear image sensor 36-pin ceramic DIP (CERDIP) (15.24 mm (600)) • µ PD3728DZ-AZ Output signal 4 (Green, even) Ground Output signal 6 (Red, even) Ground Output signal 5 (Red, odd) Ground Output drain voltage Reset ...
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ABSOLUTE MAXIMUM RATINGS (T Parameter Output drain voltage Shift register clock voltage Reset gate clock voltage Reset feed-through level clamp clock voltage Transfer gate clock voltage Note Operating ambient temperature Storage temperature Note Use at the condition without dew condensation. ...
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ELECTRICAL CHARACTERISTICS = +25° MHz, data rate = 2 MHz, storage time = 10 ms, input signal clock = 5 V φ light source: 3200 K halogen lamp +C-500S ...
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V INPUT PIN CAPACITANCE (T A Parameter Shift register clock pin capacitance 1 Shift register clock pin capacitance 2 Last stage shift register clock pin capacitance Reset gate clock pin capacitance Reset feed-through level clamp clock pin capacitance ...
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7437 7438 7435 7436 7433 7434 7431 7432 7429 7430 7427 7428 7425 7426 131 132 129 130 127 128 125 126 123 124 121 122 119 120 ...
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TIMING CHART 2 (Bit clamp mode, for each color) φ φ 10) φ φ 20) φ 1L φ RB φ CLB OUT OUT Symbol t1, t2 t1’, t2’ t5, ...
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TIMING CHART 3 (Bit clamp, for each color) φ φ TG1 to TG3 φ φ 10) φ φ 20) φ 1L φ RB φ CLB Symbol t11 t12 t13, t14 t15, t16 φ φ Notes 1. ...
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Remark Adjust cross points ( 1, 2), ( ...
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7437 7438 7435 7436 7433 7434 7431 7432 7429 7430 7427 7428 7425 7426 131 132 129 130 127 128 125 126 123 124 121 122 119 120 ...
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TIMING CHART 5 (Line clamp mode, for each color) φ φ 10) 10% 90% φ φ 20) φ 1L 10% φ RB "H" φ CLB OUT OUT Symbol t1, t2 t1’, ...
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TIMING CHART 6 (Line clamp mode, for each color) φ φ TG1 to TG3 φ φ 10) φ φ 20) 90% φ 1L φ RB φ CLB Symbol t12 t13, t14 t15, t16 t17, t18 t19 ...
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DEFINITIONS OF CHARACTERISTIC ITEMS 1. Saturation voltage : V sat Output signal voltage at which the response linearity is lost. 2. Saturation exposure : SE Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage ...
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Dark signal non-uniformity : DSNU Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. This is calculated by the following formula. DSNU (mV) : ...
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Register imbalance : RI The rate of the difference between the averages of the output voltage of Odd and Even pixels, against the average output voltage of all the valid pixels. This is calculated by the following formula. n ...
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STANDARD CHARACTERISTIC CURVES (Reference Value) DARK OUTPUT TEMPERATURE CHARACTERISTIC 0.5 0.25 0 Operating Ambient Temperature T TOTAL SPECTRAL RESPONSE CHARACTERISTICS (without infrared cut filter and heat absorbing filter 100 ...
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APPLICATION CIRCUIT EXAMPLE + µ µ 10 F/ Ω φ Ω 2 Ω 2 Ω φ Ω Caution Connect the No connection pins (NC) to GND. 18 µ PD3728DZ ...
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Remarks 1. Pin 9 ( 10) and pin 28 ( 20) should be open to decrease the influence of input clock noise to output signal waveform, in case of operating at low or middle speed range; data rate ...
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PACKAGE DRAWING CCD LINEAR IMAGE SENSOR 36-PIN CERAMIC DIP (15.24 mm (600)) 94.00±0.7 46.00±0.5 1.00±0.08 1 35.00±0.6 The 1st valid pixel index mark 24.13±0.2 20.32±0.13 48.26±0.4 20 3.00±0.08 11.00±0.15 1.00 (6.00) 2.8±0.08 1.27 2.54 0.46±0.05 20.32±0.13 1.00±0.2 4.00±0.2 Name Dimensions ...
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RECOMMENDED SOLDERING CONDITIONS When soldering this product highly recommended to observe the conditions as shown below. If other soldering processes are used the soldering is performed under different conditions, please make sure to consult with our ...
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NOTES ON HANDLING THE PACKAGES 1 MOUNTING OF THE PACKAGE The application of an excessive load to the package may cause the package to warp or break, or cause chips to come off internally. Particular care should be taken when ...
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NOTES ON HANDLING THE PACKAGES 3 OPERATE AND STORAGE ENVIRONMENTS Operate in clean environments. CCD image sensors are precise optical equipment that should not be subject to mechanical shocks. Exposure to high temperatures or humidity will affect the characteristics. So ...
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Data Sheet S15417EJ3V0DS µ PD3728DZ ...
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Data Sheet S15417EJ3V0DS µ PD3728DZ 25 ...
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Data Sheet S15417EJ3V0DS µ PD3728DZ ...
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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
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The information in this document is current as of February, 2006. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most ...