si5018 Silicon Laboratories, si5018 Datasheet - Page 15

• Manufacturer Part Number: si5018
• Description: Siphy? Oc-48/stm-16 Clock And Data Recovery Ic With Fec
• Manufacturer: Silicon Laboratories

5. Pin Descriptions: Si5018
Pin #
10
12
13
1
4
5
6
9
Pin Name
REFCLK+
REFCLK–
DOUT+
DOUT–
REXT
DIN+
DIN–
LOL
Figure 10. Si5018 Pin Configuration
I/O
Table 8. Si5018 Pin Descriptions
O
O
REFCLK+
REFCLK–
I
I
REXT
GND
VDD
Signal Level
See Table 2
See Table 2
1
2
3
4
5
20 19 18 17 16
6
LVTTL
CML
Connection
7
Rev. 1.3
GND
Pad
8
9
10
External Bias Resistor.
This resistor is used by onboard circuitry to estab-
lish bias currents within the device. This pin must
be connected to GND through a 10 kΩ (1%) resis-
tor.
Differential Reference Clock.
The reference clock sets the initial operating fre-
quency used by the onboard PLL for clock and data
recovery. Additionally, the reference clock is used to
derive the clock output when no data is present.
Loss-of-Lock.
This output is driven high when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 7.
Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins.
Differential Data Output.
The data output signal is a retimed version of the
data recovered from the signal present on DIN. It is
phase aligned with CLKOUT and is updated on the
rising edge of CLKOUT.
15
14
13
12
11
PWRDN/CAL
VDD
DOUT+
DOUT–
VDD
Description
Si5018
15